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Searched refs:RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7201 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h7730 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h8544 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h9096 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT 0x0 macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22640 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT … macro
H A Dgc_9_1_sh_mask.h24056 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h24059 #define RLC_MEM_SLP_CNTL__RLC_MEM_LS_EN__SHIFT … macro