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Searched refs:MC_SEQ_MISC0__MT__GDDR5 (Results 1 – 4 of 4) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/amdgpu/
H A Dvid.h82 #define MC_SEQ_MISC0__MT__GDDR5 0x50000000 macro
H A Dcikd.h32 #define MC_SEQ_MISC0__MT__GDDR5 0x50000000 macro
H A Dgmc_v7_0.c915 case MC_SEQ_MISC0__MT__GDDR5: in gmc_v7_0_convert_vram_type()
H A Dgmc_v8_0.c1033 case MC_SEQ_MISC0__MT__GDDR5: in gmc_v8_0_convert_vram_type()