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Searched refs:GPU_GARLIC_FLUSH_REQ__CP0_MASK (Results 1 – 3 of 3) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h729 #define GPU_GARLIC_FLUSH_REQ__CP0_MASK 0x1 macro
H A Dbif_5_0_sh_mask.h819 #define GPU_GARLIC_FLUSH_REQ__CP0_MASK 0x1 macro
H A Dbif_5_1_sh_mask.h789 #define GPU_GARLIC_FLUSH_REQ__CP0_MASK 0x1 macro