Home
last modified time | relevance | path

Searched refs:DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3008 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT 0x00000004 macro
H A Ddce_8_0_sh_mask.h1642 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h1592 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT 0x4 macro
H A Ddce_10_0_sh_mask.h1644 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h1754 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h2643 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT … macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h2007 #define DCCG_PERFMON_CNTL__DCCG_PERF_PIXCLK0_ENABLE__SHIFT … macro