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Searched refs:CP_RB0_BASE (Results 1 – 6 of 6) sorted by relevance

/dflybsd-src/sys/dev/drm/radeon/
H A Dnid.h483 #define CP_RB0_BASE 0xC100 macro
H A Dsid.h1245 #define CP_RB0_BASE 0xC100 macro
H A Dcikd.h1301 #define CP_RB0_BASE 0xC100 macro
H A Dni.c1656 CP_RB0_BASE, in cayman_cp_resume()
H A Dsi.c3681 WREG32(CP_RB0_BASE, ring->gpu_addr >> 8); in si_cp_resume()
H A Dcik.c4135 WREG32(CP_RB0_BASE, rb_addr); in cik_cp_gfx_resume()