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Searched refs:ACPILevel (Results 1 – 16 of 16) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/powerplay/smumgr/
H A Dfiji_smumgr.c1323 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in fiji_populate_smc_acpi_level()
1328 table->ACPILevel.SclkFrequency = in fiji_populate_smc_acpi_level()
1332 table->ACPILevel.SclkFrequency, in fiji_populate_smc_acpi_level()
1333 (uint32_t *)(&table->ACPILevel.MinVoltage), &mvdd); in fiji_populate_smc_acpi_level()
1339 table->ACPILevel.SclkFrequency = in fiji_populate_smc_acpi_level()
1341 table->ACPILevel.MinVoltage = in fiji_populate_smc_acpi_level()
1347 table->ACPILevel.SclkFrequency, &dividers); in fiji_populate_smc_acpi_level()
1352 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_acpi_level()
1353 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_smc_acpi_level()
1354 table->ACPILevel.DeepSleepDivId = 0; in fiji_populate_smc_acpi_level()
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H A Diceland_smumgr.c1437 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in iceland_populate_smc_acpi_level()
1440 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level()
1442 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level()
1444 table->ACPILevel.MinVddcPhases = vddc_phase_shed_control ? 0 : 1; in iceland_populate_smc_acpi_level()
1446 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in iceland_populate_smc_acpi_level()
1450 table->ACPILevel.SclkFrequency, &dividers); in iceland_populate_smc_acpi_level()
1456 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in iceland_populate_smc_acpi_level()
1457 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in iceland_populate_smc_acpi_level()
1458 table->ACPILevel.DeepSleepDivId = 0; in iceland_populate_smc_acpi_level()
1467 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in iceland_populate_smc_acpi_level()
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H A Dci_smumgr.c1389 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in ci_populate_smc_acpi_level()
1392 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
1394 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
1396 table->ACPILevel.MinVddcPhases = data->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
1398 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in ci_populate_smc_acpi_level()
1402 table->ACPILevel.SclkFrequency, &dividers); in ci_populate_smc_acpi_level()
1408 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_acpi_level()
1409 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
1410 table->ACPILevel.DeepSleepDivId = 0; in ci_populate_smc_acpi_level()
1419 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
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H A Dvegam_smumgr.c1121 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in vegam_populate_smc_acpi_level()
1129 &table->ACPILevel.MinVoltage, &mvdd); in vegam_populate_smc_acpi_level()
1136 &(table->ACPILevel.SclkSetting)); in vegam_populate_smc_acpi_level()
1141 table->ACPILevel.DeepSleepDivId = 0; in vegam_populate_smc_acpi_level()
1142 table->ACPILevel.CcPwrDynRm = 0; in vegam_populate_smc_acpi_level()
1143 table->ACPILevel.CcPwrDynRm1 = 0; in vegam_populate_smc_acpi_level()
1145 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags); in vegam_populate_smc_acpi_level()
1146 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage); in vegam_populate_smc_acpi_level()
1147 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm); in vegam_populate_smc_acpi_level()
1148 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1); in vegam_populate_smc_acpi_level()
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H A Dtonga_smumgr.c1179 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in tonga_populate_smc_acpi_level()
1181 table->ACPILevel.MinVoltage = in tonga_populate_smc_acpi_level()
1185 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in tonga_populate_smc_acpi_level()
1189 table->ACPILevel.SclkFrequency, &dividers); in tonga_populate_smc_acpi_level()
1196 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_acpi_level()
1197 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in tonga_populate_smc_acpi_level()
1198 table->ACPILevel.DeepSleepDivId = 0; in tonga_populate_smc_acpi_level()
1207 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in tonga_populate_smc_acpi_level()
1208 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2; in tonga_populate_smc_acpi_level()
1209 table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in tonga_populate_smc_acpi_level()
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H A Dpolaris10_smumgr.c1208 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in polaris10_populate_smc_acpi_level()
1216 &table->ACPILevel.MinVoltage, &mvdd); in polaris10_populate_smc_acpi_level()
1222 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); in polaris10_populate_smc_acpi_level()
1225 table->ACPILevel.DeepSleepDivId = 0; in polaris10_populate_smc_acpi_level()
1226 table->ACPILevel.CcPwrDynRm = 0; in polaris10_populate_smc_acpi_level()
1227 table->ACPILevel.CcPwrDynRm1 = 0; in polaris10_populate_smc_acpi_level()
1229 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags); in polaris10_populate_smc_acpi_level()
1230 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage); in polaris10_populate_smc_acpi_level()
1231 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm); in polaris10_populate_smc_acpi_level()
1232 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1); in polaris10_populate_smc_acpi_level()
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/dflybsd-src/sys/dev/drm/radeon/
H A Dci_dpm.c3035 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in ci_populate_smc_acpi_level()
3038 table->ACPILevel.MinVddc = cpu_to_be32(pi->acpi_vddc * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
3040 table->ACPILevel.MinVddc = cpu_to_be32(pi->min_vddc_in_pp_table * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
3042 table->ACPILevel.MinVddcPhases = pi->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
3044 table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq; in ci_populate_smc_acpi_level()
3048 table->ACPILevel.SclkFrequency, false, &dividers); in ci_populate_smc_acpi_level()
3052 table->ACPILevel.SclkDid = (u8)dividers.post_divider; in ci_populate_smc_acpi_level()
3053 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
3054 table->ACPILevel.DeepSleepDivId = 0; in ci_populate_smc_acpi_level()
3062 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
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H A Dsmu7_fusion.h234 SMU7_Fusion_ACPILevel ACPILevel; member
H A Dsmu7_discrete.h326 SMU7_Discrete_ACPILevel ACPILevel; member
/dflybsd-src/sys/dev/drm/amd/powerplay/inc/
H A Dsmu7_fusion.h234 SMU7_Fusion_ACPILevel ACPILevel; member
H A Dsmu7_discrete.h327 SMU7_Discrete_ACPILevel ACPILevel; member
H A Dsmu71_discrete.h274 SMU71_Discrete_ACPILevel ACPILevel; member
H A Dsmu73_discrete.h253 SMU73_Discrete_ACPILevel ACPILevel; member
H A Dsmu72_discrete.h269 SMU72_Discrete_ACPILevel ACPILevel; member
H A Dsmu74_discrete.h285 SMU74_Discrete_ACPILevel ACPILevel; member
H A Dsmu75_discrete.h291 SMU75_Discrete_ACPILevel ACPILevel; member