1 /* $NetBSD: vrc4172pci.c,v 1.20 2021/08/07 16:18:54 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2002 TAKEMURA Shin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the project nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: vrc4172pci.c,v 1.20 2021/08/07 16:18:54 thorpej Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38
39 #include <machine/bus.h>
40 #include <machine/bus_space_hpcmips.h>
41 #include <machine/bus_dma_hpcmips.h>
42 #include <machine/config_hook.h>
43 #include <machine/platid.h>
44 #include <machine/platid_mask.h>
45
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcidevs.h>
48 #include <dev/pci/pciidereg.h>
49
50 #include <hpcmips/vr/icureg.h>
51 #include <hpcmips/vr/vripif.h>
52 #include <hpcmips/vr/vrc4172pcireg.h>
53
54 #include "pci.h"
55 #include "opt_vrc4172pci.h"
56
57 #ifdef DEBUG
58 #define DPRINTF(args) printf args
59 #else
60 #define DPRINTF(args) while (0) {}
61 #endif
62
63 struct vrc4172pci_softc {
64 device_t sc_dev;
65
66 bus_space_tag_t sc_iot;
67 bus_space_handle_t sc_ioh;
68
69 struct hpcmips_pci_chipset sc_pc;
70 #ifdef VRC4172PCI_MCR700_SUPPORT
71 pcireg_t sc_fake_baseaddr;
72 hpcio_chip_t sc_iochip;
73 #if 0
74 hpcio_intr_handle_t sc_ih;
75 #endif
76 #endif /* VRC4172PCI_MCR700_SUPPORT */
77 };
78
79 static int vrc4172pci_match(device_t, cfdata_t, void *);
80 static void vrc4172pci_attach(device_t, device_t, void *);
81 static void vrc4172pci_attach_hook(device_t, device_t,
82 struct pcibus_attach_args *);
83 static int vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int);
84 static int vrc4172pci_bus_devorder(pci_chipset_tag_t, int, uint8_t *, int);
85 static pcitag_t vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int);
86 static void vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
87 int *, int *);
88 static pcireg_t vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
89 static void vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
90 pcireg_t);
91 static int vrc4172pci_intr_map(const struct pci_attach_args *,
92 pci_intr_handle_t *);
93 static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t,
94 char *, size_t);
95 static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t,
96 pci_intr_handle_t);
97 static void *vrc4172pci_intr_establish(pci_chipset_tag_t,
98 pci_intr_handle_t, int, int (*)(void *), void *);
99 static void vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *);
100 #ifdef VRC4172PCI_MCR700_SUPPORT
101 #if 0
102 static int vrc4172pci_mcr700_intr(void *arg);
103 #endif
104 #endif
105
106 CFATTACH_DECL_NEW(vrc4172pci, sizeof(struct vrc4172pci_softc),
107 vrc4172pci_match, vrc4172pci_attach, NULL, NULL);
108
109 static inline void
vrc4172pci_write(struct vrc4172pci_softc * sc,int offset,u_int32_t val)110 vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)
111 {
112
113 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
114 }
115
116 static inline u_int32_t
vrc4172pci_read(struct vrc4172pci_softc * sc,int offset)117 vrc4172pci_read(struct vrc4172pci_softc *sc, int offset)
118 {
119 u_int32_t res;
120
121 if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) {
122 res = 0xffffffff;
123 }
124
125 return (res);
126 }
127
128 static int
vrc4172pci_match(device_t parent,cfdata_t match,void * aux)129 vrc4172pci_match(device_t parent, cfdata_t match, void *aux)
130 {
131
132 return (1);
133 }
134
135 static void
vrc4172pci_attach(device_t parent,device_t self,void * aux)136 vrc4172pci_attach(device_t parent, device_t self, void *aux)
137 {
138 struct vrc4172pci_softc *sc = device_private(self);
139 pci_chipset_tag_t pc = &sc->sc_pc;
140 struct vrip_attach_args *va = aux;
141 #if NPCI > 0
142 struct pcibus_attach_args pba;
143 #endif
144
145 sc->sc_dev = self;
146 sc->sc_iot = va->va_iot;
147 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
148 &sc->sc_ioh)) {
149 printf(": couldn't map io space\n");
150 return;
151 }
152 printf("\n");
153
154 #ifdef VRC4172PCI_MCR700_SUPPORT
155 if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700) ||
156 platid_match(&platid, &platid_mask_MACH_NEC_MCR_700A) ||
157 platid_match(&platid, &platid_mask_MACH_NEC_MCR_730) ||
158 platid_match(&platid, &platid_mask_MACH_NEC_MCR_730A)) {
159 /* power USB controller on MC-R700 */
160 sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU];
161 hpcio_portwrite(sc->sc_iochip, 45, 1);
162 sc->sc_fake_baseaddr = 0x0afe0000;
163 #if 0
164 sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1,
165 HPCIO_INTR_EDGE|HPCIO_INTR_HOLD,
166 vrc4172pci_mcr700_intr, sc);
167 #endif
168 }
169 #endif /* VRC4172PCI_MCR700_SUPPORT */
170
171 pc->pc_dev = sc->sc_dev;
172 pc->pc_attach_hook = vrc4172pci_attach_hook;
173 pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs;
174 pc->pc_bus_devorder = vrc4172pci_bus_devorder;
175 pc->pc_make_tag = vrc4172pci_make_tag;
176 pc->pc_decompose_tag = vrc4172pci_decompose_tag;
177 pc->pc_conf_read = vrc4172pci_conf_read;
178 pc->pc_conf_write = vrc4172pci_conf_write;
179 pc->pc_intr_map = vrc4172pci_intr_map;
180 pc->pc_intr_string = vrc4172pci_intr_string;
181 pc->pc_intr_evcnt = vrc4172pci_intr_evcnt;
182 pc->pc_intr_establish = vrc4172pci_intr_establish;
183 pc->pc_intr_disestablish = vrc4172pci_intr_disestablish;
184
185 #if 0
186 {
187 int i;
188
189 for (i = 0; i < 2; i++)
190 printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
191 device_xname(self), i,
192 pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
193 PCI_ID_REG));
194 }
195 #endif
196
197 #if NPCI > 0
198 memset(&pba, 0, sizeof(pba));
199 pba.pba_iot = sc->sc_iot;
200 pba.pba_memt = sc->sc_iot;
201 pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
202 pba.pba_dmat64 = NULL;
203 pba.pba_bus = 0;
204 pba.pba_bridgetag = NULL;
205 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
206 PCI_FLAGS_MRL_OKAY;
207 pba.pba_pc = pc;
208
209 config_found(self, &pba, pcibusprint, CFARGS_NONE);
210 #endif
211 }
212
213 void
vrc4172pci_attach_hook(device_t parent,device_t self,struct pcibus_attach_args * pba)214 vrc4172pci_attach_hook(device_t parent, device_t self,
215 struct pcibus_attach_args *pba)
216 {
217
218 return;
219 }
220
221 int
vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc,int busno)222 vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
223 {
224
225 return (1); /* Vrc4172 has only one device */
226 }
227
228 int
vrc4172pci_bus_devorder(pci_chipset_tag_t pc,int busno,uint8_t * devs,int maxdevs)229 vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, uint8_t *devs,
230 int maxdevs)
231 {
232 if (maxdevs <= 0)
233 return 0;
234 devs[0] = 0;
235 return 1;
236 }
237
238 pcitag_t
vrc4172pci_make_tag(pci_chipset_tag_t pc,int bus,int device,int function)239 vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
240 {
241
242 return ((bus << 16) | (device << 11) | (function << 8));
243 }
244
245 void
vrc4172pci_decompose_tag(pci_chipset_tag_t pc,pcitag_t tag,int * bp,int * dp,int * fp)246 vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
247 int *fp)
248 {
249
250 if (bp != NULL)
251 *bp = (tag >> 16) & 0xff;
252 if (dp != NULL)
253 *dp = (tag >> 11) & 0x1f;
254 if (fp != NULL)
255 *fp = (tag >> 8) & 0x07;
256 }
257
258 pcireg_t
vrc4172pci_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg)259 vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
260 {
261 struct vrc4172pci_softc *sc = device_private(pc->pc_dev);
262 u_int32_t val;
263
264 if ((unsigned int)reg >= PCI_CONF_SIZE)
265 return ((pcireg_t) -1);
266
267 #ifdef VRC4172PCI_MCR700_SUPPORT
268 if (sc->sc_fake_baseaddr != 0 &&
269 tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
270 reg == PCI_MAPREG_START) {
271 val = sc->sc_fake_baseaddr;
272 goto out;
273 }
274 #endif /* VRC4172PCI_MCR700_SUPPORT */
275
276 tag |= VRC4172PCI_CONFADDR_CONFIGEN;
277
278 vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
279 val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);
280
281 #ifdef VRC4172PCI_MCR700_SUPPORT
282 out:
283 #endif
284 DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
285 device_xname(sc->sc_dev), (u_int32_t)tag, reg, val));
286
287 return (val);
288 }
289
290 void
vrc4172pci_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)291 vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
292 pcireg_t data)
293 {
294 struct vrc4172pci_softc *sc = device_private(pc->pc_dev);
295
296 DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
297 device_xname(sc->sc_dev), (u_int32_t)tag, reg, (u_int32_t)data));
298
299 if ((unsigned int)reg >= PCI_CONF_SIZE)
300 return;
301
302 #ifdef VRC4172PCI_MCR700_SUPPORT
303 if (sc->sc_fake_baseaddr != 0 &&
304 tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
305 reg == PCI_MAPREG_START) {
306 sc->sc_fake_baseaddr = (data & 0xfffff000);
307 return;
308 }
309 #endif /* VRC4172PCI_MCR700_SUPPORT */
310
311 tag |= VRC4172PCI_CONFADDR_CONFIGEN;
312
313 vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
314 vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data);
315 }
316
317 int
vrc4172pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)318 vrc4172pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
319 {
320 pci_chipset_tag_t pc = pa->pa_pc;
321 pcitag_t intrtag = pa->pa_intrtag;
322 int bus, dev, func;
323
324 pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
325 DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", device_xname(pc->pc_dev),
326 bus, dev, func, pa->pa_intrline, pa->pa_intrpin));
327
328 *ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
329
330 return (0);
331 }
332
333 const char *
vrc4172pci_intr_string(pci_chipset_tag_t pc,pci_intr_handle_t ih,char * buf,size_t len)334 vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
335 size_t len)
336 {
337 snprintf(buf, len, "pciintr %d:%d:%d",
338 CONFIG_HOOK_PCIINTR_BUS((int)ih),
339 CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
340 CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
341
342 return buf;
343 }
344
345 const struct evcnt *
vrc4172pci_intr_evcnt(pci_chipset_tag_t pc,pci_intr_handle_t ih)346 vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
347 {
348
349 return (NULL);
350 }
351
352 void *
vrc4172pci_intr_establish(pci_chipset_tag_t pc,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg)353 vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
354 int level, int (*func)(void *), void *arg)
355 {
356
357 if (ih == -1)
358 return (NULL);
359 DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih));
360
361 return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
362 (int (*)(void *, int, long, void *))func, arg));
363 }
364
365 void
vrc4172pci_intr_disestablish(pci_chipset_tag_t pc,void * cookie)366 vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
367 {
368
369 DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie));
370 config_unhook(cookie);
371 }
372
373 #ifdef VRC4172PCI_MCR700_SUPPORT
374 #if 0
375 int
376 vrc4172pci_mcr700_intr(void *arg)
377 {
378 struct vrc4172pci_softc *sc = arg;
379
380 hpcio_intr_clear(sc->sc_iochip, sc->sc_ih);
381 printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF");
382 hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1));
383
384 return (0);
385 }
386 #endif
387 #endif /* VRC4172PCI_MCR700_SUPPORT */
388