xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/vega20_smumgr.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: vega20_smumgr.h,v 1.2 2021/12/18 23:45:27 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2018 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 #ifndef _VEGA20_SMUMANAGER_H_
26 #define _VEGA20_SMUMANAGER_H_
27 
28 #include "hwmgr.h"
29 #include "smu11_driver_if.h"
30 
31 struct smu_table_entry {
32 	uint32_t version;
33 	uint32_t size;
34 	uint64_t mc_addr;
35 	void *table;
36 	struct amdgpu_bo *handle;
37 };
38 
39 struct smu_table_array {
40 	struct smu_table_entry entry[TABLE_COUNT];
41 };
42 
43 struct vega20_smumgr {
44 	struct smu_table_array            smu_tables;
45 };
46 
47 #define SMU_FEATURES_LOW_MASK        0x00000000FFFFFFFF
48 #define SMU_FEATURES_LOW_SHIFT       0
49 #define SMU_FEATURES_HIGH_MASK       0xFFFFFFFF00000000
50 #define SMU_FEATURES_HIGH_SHIFT      32
51 
52 int vega20_enable_smc_features(struct pp_hwmgr *hwmgr,
53 		bool enable, uint64_t feature_mask);
54 int vega20_get_enabled_smc_features(struct pp_hwmgr *hwmgr,
55 		uint64_t *features_enabled);
56 int vega20_set_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
57 		uint8_t *table, uint16_t workload_type);
58 int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
59 		uint8_t *table, uint16_t workload_type);
60 int vega20_set_pptable_driver_address(struct pp_hwmgr *hwmgr);
61 
62 bool vega20_is_smc_ram_running(struct pp_hwmgr *hwmgr);
63 
64 #endif
65 
66