xref: /netbsd-src/sys/external/bsd/drm2/dist/include/uapi/drm/v3d_drm.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: v3d_drm.h,v 1.2 2021/12/18 23:45:46 riastradh Exp $	*/
2 
3 /*
4  * Copyright © 2014-2018 Broadcom
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23  * IN THE SOFTWARE.
24  */
25 
26 #ifndef _V3D_DRM_H_
27 #define _V3D_DRM_H_
28 
29 #include "drm.h"
30 
31 #if defined(__cplusplus)
32 extern "C" {
33 #endif
34 
35 #define DRM_V3D_SUBMIT_CL                         0x00
36 #define DRM_V3D_WAIT_BO                           0x01
37 #define DRM_V3D_CREATE_BO                         0x02
38 #define DRM_V3D_MMAP_BO                           0x03
39 #define DRM_V3D_GET_PARAM                         0x04
40 #define DRM_V3D_GET_BO_OFFSET                     0x05
41 #define DRM_V3D_SUBMIT_TFU                        0x06
42 #define DRM_V3D_SUBMIT_CSD                        0x07
43 
44 #define DRM_IOCTL_V3D_SUBMIT_CL           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
45 #define DRM_IOCTL_V3D_WAIT_BO             DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
46 #define DRM_IOCTL_V3D_CREATE_BO           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
47 #define DRM_IOCTL_V3D_MMAP_BO             DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
48 #define DRM_IOCTL_V3D_GET_PARAM           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
49 #define DRM_IOCTL_V3D_GET_BO_OFFSET       DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
50 #define DRM_IOCTL_V3D_SUBMIT_TFU          DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)
51 #define DRM_IOCTL_V3D_SUBMIT_CSD          DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)
52 
53 #define DRM_V3D_SUBMIT_CL_FLUSH_CACHE             0x01
54 
55 /**
56  * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D
57  * engine.
58  *
59  * This asks the kernel to have the GPU execute an optional binner
60  * command list, and a render command list.
61  *
62  * The L1T, slice, L2C, L2T, and GCA caches will be flushed before
63  * each CL executes.  The VCD cache should be flushed (if necessary)
64  * by the submitted CLs.  The TLB writes are guaranteed to have been
65  * flushed by the time the render done IRQ happens, which is the
66  * trigger for out_sync.  Any dirtying of cachelines by the job (only
67  * possible using TMU writes) must be flushed by the caller using the
68  * DRM_V3D_SUBMIT_CL_FLUSH_CACHE_FLAG flag.
69  */
70 struct drm_v3d_submit_cl {
71 	/* Pointer to the binner command list.
72 	 *
73 	 * This is the first set of commands executed, which runs the
74 	 * coordinate shader to determine where primitives land on the screen,
75 	 * then writes out the state updates and draw calls necessary per tile
76 	 * to the tile allocation BO.
77 	 *
78 	 * This BCL will block on any previous BCL submitted on the
79 	 * same FD, but not on any RCL or BCLs submitted by other
80 	 * clients -- that is left up to the submitter to control
81 	 * using in_sync_bcl if necessary.
82 	 */
83 	__u32 bcl_start;
84 
85 	/** End address of the BCL (first byte after the BCL) */
86 	__u32 bcl_end;
87 
88 	/* Offset of the render command list.
89 	 *
90 	 * This is the second set of commands executed, which will either
91 	 * execute the tiles that have been set up by the BCL, or a fixed set
92 	 * of tiles (in the case of RCL-only blits).
93 	 *
94 	 * This RCL will block on this submit's BCL, and any previous
95 	 * RCL submitted on the same FD, but not on any RCL or BCLs
96 	 * submitted by other clients -- that is left up to the
97 	 * submitter to control using in_sync_rcl if necessary.
98 	 */
99 	__u32 rcl_start;
100 
101 	/** End address of the RCL (first byte after the RCL) */
102 	__u32 rcl_end;
103 
104 	/** An optional sync object to wait on before starting the BCL. */
105 	__u32 in_sync_bcl;
106 	/** An optional sync object to wait on before starting the RCL. */
107 	__u32 in_sync_rcl;
108 	/** An optional sync object to place the completion fence in. */
109 	__u32 out_sync;
110 
111 	/* Offset of the tile alloc memory
112 	 *
113 	 * This is optional on V3D 3.3 (where the CL can set the value) but
114 	 * required on V3D 4.1.
115 	 */
116 	__u32 qma;
117 
118 	/** Size of the tile alloc memory. */
119 	__u32 qms;
120 
121 	/** Offset of the tile state data array. */
122 	__u32 qts;
123 
124 	/* Pointer to a u32 array of the BOs that are referenced by the job.
125 	 */
126 	__u64 bo_handles;
127 
128 	/* Number of BO handles passed in (size is that times 4). */
129 	__u32 bo_handle_count;
130 
131 	__u32 flags;
132 };
133 
134 /**
135  * struct drm_v3d_wait_bo - ioctl argument for waiting for
136  * completion of the last DRM_V3D_SUBMIT_CL on a BO.
137  *
138  * This is useful for cases where multiple processes might be
139  * rendering to a BO and you want to wait for all rendering to be
140  * completed.
141  */
142 struct drm_v3d_wait_bo {
143 	__u32 handle;
144 	__u32 pad;
145 	__u64 timeout_ns;
146 };
147 
148 /**
149  * struct drm_v3d_create_bo - ioctl argument for creating V3D BOs.
150  *
151  * There are currently no values for the flags argument, but it may be
152  * used in a future extension.
153  */
154 struct drm_v3d_create_bo {
155 	__u32 size;
156 	__u32 flags;
157 	/** Returned GEM handle for the BO. */
158 	__u32 handle;
159 	/**
160 	 * Returned offset for the BO in the V3D address space.  This offset
161 	 * is private to the DRM fd and is valid for the lifetime of the GEM
162 	 * handle.
163 	 *
164 	 * This offset value will always be nonzero, since various HW
165 	 * units treat 0 specially.
166 	 */
167 	__u32 offset;
168 };
169 
170 /**
171  * struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs.
172  *
173  * This doesn't actually perform an mmap.  Instead, it returns the
174  * offset you need to use in an mmap on the DRM device node.  This
175  * means that tools like valgrind end up knowing about the mapped
176  * memory.
177  *
178  * There are currently no values for the flags argument, but it may be
179  * used in a future extension.
180  */
181 struct drm_v3d_mmap_bo {
182 	/** Handle for the object being mapped. */
183 	__u32 handle;
184 	__u32 flags;
185 	/** offset into the drm node to use for subsequent mmap call. */
186 	__u64 offset;
187 };
188 
189 enum drm_v3d_param {
190 	DRM_V3D_PARAM_V3D_UIFCFG,
191 	DRM_V3D_PARAM_V3D_HUB_IDENT1,
192 	DRM_V3D_PARAM_V3D_HUB_IDENT2,
193 	DRM_V3D_PARAM_V3D_HUB_IDENT3,
194 	DRM_V3D_PARAM_V3D_CORE0_IDENT0,
195 	DRM_V3D_PARAM_V3D_CORE0_IDENT1,
196 	DRM_V3D_PARAM_V3D_CORE0_IDENT2,
197 	DRM_V3D_PARAM_SUPPORTS_TFU,
198 	DRM_V3D_PARAM_SUPPORTS_CSD,
199 	DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH,
200 };
201 
202 struct drm_v3d_get_param {
203 	__u32 param;
204 	__u32 pad;
205 	__u64 value;
206 };
207 
208 /**
209  * Returns the offset for the BO in the V3D address space for this DRM fd.
210  * This is the same value returned by drm_v3d_create_bo, if that was called
211  * from this DRM fd.
212  */
213 struct drm_v3d_get_bo_offset {
214 	__u32 handle;
215 	__u32 offset;
216 };
217 
218 struct drm_v3d_submit_tfu {
219 	__u32 icfg;
220 	__u32 iia;
221 	__u32 iis;
222 	__u32 ica;
223 	__u32 iua;
224 	__u32 ioa;
225 	__u32 ios;
226 	__u32 coef[4];
227 	/* First handle is the output BO, following are other inputs.
228 	 * 0 for unused.
229 	 */
230 	__u32 bo_handles[4];
231 	/* sync object to block on before running the TFU job.  Each TFU
232 	 * job will execute in the order submitted to its FD.  Synchronization
233 	 * against rendering jobs requires using sync objects.
234 	 */
235 	__u32 in_sync;
236 	/* Sync object to signal when the TFU job is done. */
237 	__u32 out_sync;
238 };
239 
240 /* Submits a compute shader for dispatch.  This job will block on any
241  * previous compute shaders submitted on this fd, and any other
242  * synchronization must be performed with in_sync/out_sync.
243  */
244 struct drm_v3d_submit_csd {
245 	__u32 cfg[7];
246 	__u32 coef[4];
247 
248 	/* Pointer to a u32 array of the BOs that are referenced by the job.
249 	 */
250 	__u64 bo_handles;
251 
252 	/* Number of BO handles passed in (size is that times 4). */
253 	__u32 bo_handle_count;
254 
255 	/* sync object to block on before running the CSD job.  Each
256 	 * CSD job will execute in the order submitted to its FD.
257 	 * Synchronization against rendering/TFU jobs or CSD from
258 	 * other fds requires using sync objects.
259 	 */
260 	__u32 in_sync;
261 	/* Sync object to signal when the CSD job is done. */
262 	__u32 out_sync;
263 };
264 
265 #if defined(__cplusplus)
266 }
267 #endif
268 
269 #endif /* _V3D_DRM_H_ */
270