1 /* $NetBSD: ti_usb.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: ti_usb.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/device.h>
34 #include <sys/conf.h>
35 #include <sys/mutex.h>
36 #include <sys/bus.h>
37
38 #include <dev/fdt/fdtvar.h>
39
40 #include <arm/ti/ti_prcm.h>
41
42 #define UHH_SYSCONFIG 0x10
43 #define UHH_SYSCONFIG_MIDLEMODE_MASK 0x00003000
44 #define UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY 0x00002000
45 #define UHH_SYSCONFIG_CLOCKACTIVITY 0x00000100
46 #define UHH_SYSCONFIG_SIDLEMODE_MASK 0x00000018
47 #define UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE 0x00000008
48 #define UHH_SYSCONFIG_ENAWAKEUP 0x00000004
49 #define UHH_SYSCONFIG_SOFTRESET 0x00000002
50 #define UHH_SYSCONFIG_AUTOIDLE 0x00000001
51
52 #define UHH_HOSTCONFIG 0x40
53 #define UHH_HOSTCONFIG_APP_START_CLK __BIT(31)
54 #define UHH_HOSTCONFIG_P3_MODE __BITS(21,20)
55 #define UHH_HOSTCONFIG_P2_MODE __BITS(19,18)
56 #define UHH_HOSTCONFIG_P1_MODE __BITS(17,16)
57 #define UHH_HOSTCONFIG_PMODE_ULPI_PHY 0
58 #define UHH_HOSTCONFIG_PMODE_UTMI 1
59 #define UHH_HOSTCONFIG_PMODE_HSIC 3
60 #define UHH_HOSTCONFIG_P3_ULPI_BYPASS __BIT(12)
61 #define UHH_HOSTCONFIG_P2_ULPI_BYPASS __BIT(11)
62 #define UHH_HOSTCONFIG_P3_CONNECT_STATUS __BIT(10)
63 #define UHH_HOSTCONFIG_P2_CONNECT_STATUS __BIT(9)
64 #define UHH_HOSTCONFIG_P1_CONNECT_STATUS __BIT(8)
65 #define UHH_HOSTCONFIG_ENA_INCR_ALIGN __BIT(5)
66 #define UHH_HOSTCONFIG_ENA_INCR16 __BIT(4)
67 #define UHH_HOSTCONFIG_ENA_INCR8 __BIT(3)
68 #define UHH_HOSTCONFIG_ENA_INCR4 __BIT(2)
69 #define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN __BIT(1)
70 #define UHH_HOSTCONFIG_P1_ULPI_BYPASS __BIT(0)
71
72 extern void tl_usbtll_enable_port(u_int);
73
74 static const struct device_compatible_entry compat_data[] = {
75 { .compat = "ti,usbhs-host" },
76 DEVICE_COMPAT_EOL
77 };
78
79 #define TI_USB_NPORTS 3
80
81 enum {
82 CONNECT_STATUS,
83 ULPI_BYPASS,
84 TI_USB_NBITS
85 };
86
87 static const uint32_t ti_usb_portbits[TI_USB_NPORTS][TI_USB_NBITS] = {
88 [0] = {
89 [CONNECT_STATUS] = UHH_HOSTCONFIG_P1_CONNECT_STATUS,
90 [ULPI_BYPASS] = UHH_HOSTCONFIG_P1_ULPI_BYPASS,
91 },
92 [1] = {
93 [CONNECT_STATUS] = UHH_HOSTCONFIG_P2_CONNECT_STATUS,
94 [ULPI_BYPASS] = UHH_HOSTCONFIG_P2_ULPI_BYPASS,
95 },
96 [2] = {
97 [CONNECT_STATUS] = UHH_HOSTCONFIG_P3_CONNECT_STATUS,
98 [ULPI_BYPASS] = UHH_HOSTCONFIG_P3_ULPI_BYPASS,
99 },
100 };
101
102 enum {
103 PORT_UNUSED,
104 PORT_EHCI_PHY,
105 PORT_EHCI_TLL,
106 PORT_EHCI_HSIC,
107 };
108
109 struct ti_usb_softc {
110 device_t sc_dev;
111 bus_space_tag_t sc_bst;
112 bus_space_handle_t sc_bsh;
113
114 u_int sc_portmode[TI_USB_NPORTS];
115 };
116
117 static int ti_usb_match(device_t, cfdata_t, void *);
118 static void ti_usb_attach(device_t, device_t, void *);
119
120 CFATTACH_DECL_NEW(ti_usb, sizeof(struct ti_usb_softc),
121 ti_usb_match, ti_usb_attach, NULL, NULL);
122
123 #define RD4(sc, reg) \
124 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
125 #define WR4(sc, reg, val) \
126 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
127
128 static void
ti_usb_init(struct ti_usb_softc * sc)129 ti_usb_init(struct ti_usb_softc *sc)
130 {
131 uint32_t val;
132 int port;
133
134 val = RD4(sc, UHH_SYSCONFIG);
135 val &= ~(UHH_SYSCONFIG_SIDLEMODE_MASK|UHH_SYSCONFIG_MIDLEMODE_MASK);
136 val |= UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY;
137 val |= UHH_SYSCONFIG_CLOCKACTIVITY;
138 val |= UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE;
139 val |= UHH_SYSCONFIG_ENAWAKEUP;
140 val &= ~UHH_SYSCONFIG_AUTOIDLE;
141 WR4(sc, UHH_SYSCONFIG, val);
142
143 val = RD4(sc, UHH_SYSCONFIG);
144
145 val = RD4(sc, UHH_HOSTCONFIG);
146 val |= UHH_HOSTCONFIG_ENA_INCR16;
147 val |= UHH_HOSTCONFIG_ENA_INCR8;
148 val |= UHH_HOSTCONFIG_ENA_INCR4;
149 val |= UHH_HOSTCONFIG_APP_START_CLK;
150 val &= ~UHH_HOSTCONFIG_ENA_INCR_ALIGN;
151 for (port = 0; port < TI_USB_NPORTS; port++) {
152 if (sc->sc_portmode[port] == PORT_UNUSED)
153 val &= ~ti_usb_portbits[port][CONNECT_STATUS];
154 if (sc->sc_portmode[port] == PORT_EHCI_PHY)
155 val &= ~ti_usb_portbits[port][ULPI_BYPASS];
156 else
157 val |= ti_usb_portbits[port][ULPI_BYPASS];
158 }
159 WR4(sc, UHH_HOSTCONFIG, val);
160 }
161
162 static int
ti_usb_match(device_t parent,cfdata_t match,void * aux)163 ti_usb_match(device_t parent, cfdata_t match, void *aux)
164 {
165 struct fdt_attach_args * const faa = aux;
166
167 return of_compatible_match(faa->faa_phandle, compat_data);
168 }
169
170 static void
ti_usb_attach(device_t parent,device_t self,void * aux)171 ti_usb_attach(device_t parent, device_t self, void *aux)
172 {
173 struct ti_usb_softc *sc = device_private(self);
174 struct fdt_attach_args * const faa = aux;
175 const int phandle = faa->faa_phandle;
176 bus_addr_t addr;
177 bus_size_t size;
178 char propname[16];
179 const char *portmode;
180 int port;
181
182 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
183 aprint_error(": couldn't get registers\n");
184 return;
185 }
186
187 if (ti_prcm_enable_hwmod(phandle, 0) != 0) {
188 aprint_error(": couldn't enable module\n");
189 return;
190 }
191
192 sc->sc_dev = self;
193 sc->sc_bst = faa->faa_bst;
194 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
195 aprint_error(": couldn't map registers\n");
196 return;
197 }
198
199 for (port = 0; port < TI_USB_NPORTS; port++) {
200 snprintf(propname, sizeof(propname), "port%d-mode", port + 1);
201 portmode = fdtbus_get_string(phandle, propname);
202 if (portmode == NULL)
203 continue;
204 if (strcmp(portmode, "ehci-phy") == 0)
205 sc->sc_portmode[port] = PORT_EHCI_PHY;
206 else if (strcmp(portmode, "ehci-tll") == 0)
207 sc->sc_portmode[port] = PORT_EHCI_TLL;
208 else if (strcmp(portmode, "ehci-hsic") == 0)
209 sc->sc_portmode[port] = PORT_EHCI_HSIC;
210
211 if (sc->sc_portmode[port] != PORT_UNUSED)
212 tl_usbtll_enable_port(port);
213 }
214
215 aprint_naive("\n");
216 aprint_normal(": OMAP HS USB Host\n");
217
218 ti_usb_init(sc);
219
220 fdt_add_bus(self, phandle, faa);
221 }
222