xref: /netbsd-src/sys/arch/arm/ti/ti_ehci.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1 /* $NetBSD: ti_ehci.c,v 1.5 2021/08/07 16:18:46 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2015-2019 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ti_ehci.c,v 1.5 2021/08/07 16:18:46 thorpej Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 
39 #include <dev/usb/usb.h>
40 #include <dev/usb/usbdi.h>
41 #include <dev/usb/usbdivar.h>
42 #include <dev/usb/usb_mem.h>
43 #include <dev/usb/ehcireg.h>
44 #include <dev/usb/ehcivar.h>
45 
46 #include <dev/fdt/fdtvar.h>
47 
48 #define	TI_EHCI_NPORTS	3
49 
50 static int	ti_ehci_match(device_t, cfdata_t, void *);
51 static void	ti_ehci_attach(device_t, device_t, void *);
52 
53 CFATTACH_DECL2_NEW(ti_ehci, sizeof(struct ehci_softc),
54 	ti_ehci_match, ti_ehci_attach, NULL,
55 	ehci_activate, NULL, ehci_childdet);
56 
57 static const struct device_compatible_entry compat_data[] = {
58 	{ .compat = "ti,ehci-omap" },
59 	DEVICE_COMPAT_EOL
60 };
61 
62 static int
ti_ehci_match(device_t parent,cfdata_t cf,void * aux)63 ti_ehci_match(device_t parent, cfdata_t cf, void *aux)
64 {
65 	struct fdt_attach_args * const faa = aux;
66 
67 	return of_compatible_match(faa->faa_phandle, compat_data);
68 }
69 
70 static void
ti_ehci_attach(device_t parent,device_t self,void * aux)71 ti_ehci_attach(device_t parent, device_t self, void *aux)
72 {
73 	struct ehci_softc * const sc = device_private(self);
74 	struct fdt_attach_args * const faa = aux;
75 	const int phandle = faa->faa_phandle;
76 	struct fdtbus_reset *rst;
77 	struct fdtbus_phy *phy;
78 	struct clk *clk;
79 	char intrstr[128];
80 	bus_addr_t addr;
81 	bus_size_t size;
82 	int error;
83 	void *ih;
84 	u_int n;
85 
86 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
87 		aprint_error(": couldn't get registers\n");
88 		return;
89 	}
90 
91 	/* Enable clocks */
92 	for (n = 0; (clk = fdtbus_clock_get_index(phandle, n)) != NULL; n++)
93 		if (clk_enable(clk) != 0) {
94 			aprint_error(": couldn't enable clock #%d\n", n);
95 			return;
96 		}
97 	/* De-assert resets */
98 	for (n = 0; (rst = fdtbus_reset_get_index(phandle, n)) != NULL; n++)
99 		if (fdtbus_reset_deassert(rst) != 0) {
100 			aprint_error(": couldn't de-assert reset #%d\n", n);
101 			return;
102 		}
103 
104 	sc->sc_dev = self;
105 	sc->sc_bus.ub_hcpriv = sc;
106 	sc->sc_bus.ub_dmatag = faa->faa_dmat;
107 	sc->sc_bus.ub_revision = USBREV_2_0;
108 	if (of_hasprop(phandle, "has-transaction-translator"))
109 		sc->sc_flags |= EHCIF_ETTF;
110 	else
111 		sc->sc_ncomp = 1;
112 	sc->sc_size = size;
113 	sc->iot = faa->faa_bst;
114 	if (bus_space_map(sc->iot, addr, size, 0, &sc->ioh) != 0) {
115 		aprint_error(": couldn't map registers\n");
116 		return;
117 	}
118 
119 	aprint_naive("\n");
120 	aprint_normal(": EHCI\n");
121 
122 	/* Enable PHYs */
123 	for (n = 0; n < TI_EHCI_NPORTS; n++) {
124 		phy = fdtbus_phy_get_index(phandle, n);
125 		if (phy && fdtbus_phy_enable(phy, true) != 0) {
126 			aprint_error(": couldn't enable phy\n");
127 			return;
128 		}
129 	}
130 
131 	/* Disable interrupts */
132 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
133 	EOWRITE4(sc, EHCI_USBINTR, 0);
134 
135 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
136 		aprint_error_dev(self, "failed to decode interrupt\n");
137 		return;
138 	}
139 
140 	ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
141 	    ehci_intr, sc, device_xname(self));
142 	if (ih == NULL) {
143 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
144 		    intrstr);
145 		return;
146 	}
147 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
148 
149 	error = ehci_init(sc);
150 	if (error) {
151 		aprint_error_dev(self, "init failed, error = %d\n", error);
152 		return;
153 	}
154 
155 	pmf_device_register1(self, NULL, NULL, ehci_shutdown);
156 
157 	sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint, CFARGS_NONE);
158 }
159