1 /* $NetBSD: sun5i_a13_ccu.h,v 1.1 2017/08/25 00:07:03 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _SUN5I_A13_CCU_H 30 #define _SUN5I_A13_CCU_H 31 32 #define A13_RST_USB_PHY0 0 33 #define A13_RST_USB_PHY1 1 34 #define A13_RST_GPS 2 35 #define A13_RST_DE_BE 3 36 #define A13_RST_DE_FE 4 37 #define A13_RST_TVE 5 38 #define A13_RST_LCD 6 39 #define A13_RST_CSI 7 40 #define A13_RST_VE 8 41 #define A13_RST_GPU 9 42 #define A13_RST_IEP 10 43 44 #define A13_CLK_HOSC 1 45 #define A13_CLK_PLL_CORE 2 46 #define A13_CLK_PLL_AUDIO_BASE 3 47 #define A13_CLK_PLL_AUDIO 4 48 #define A13_CLK_PLL_AUDIO_2X 5 49 #define A13_CLK_PLL_AUDIO_4X 6 50 #define A13_CLK_PLL_AUDIO_8X 7 51 #define A13_CLK_PLL_VIDEO0 8 52 #define A13_CLK_PLL_VIDEO0_2X 9 53 #define A13_CLK_PLL_VE 10 54 #define A13_CLK_PLL_DDR_BASE 11 55 #define A13_CLK_PLL_DDR 12 56 #define A13_CLK_PLL_DDR_OTHER 13 57 #define A13_CLK_PERIPH 14 58 #define A13_CLK_VIDEO1 15 59 #define A13_CLK_VIDEO1_2X 16 60 #define A13_CLK_CPU 17 61 #define A13_CLK_AXI 18 62 #define A13_CLK_AHB 19 63 #define A13_CLK_APB0 20 64 #define A13_CLK_APB1 21 65 #define A13_CLK_DRAM_AXI 22 66 #define A13_CLK_AHB_OTG 23 67 #define A13_CLK_AHB_EHCI 24 68 #define A13_CLK_AHB_OHCI 25 69 #define A13_CLK_AHB_SS 26 70 #define A13_CLK_AHB_DMA 27 71 #define A13_CLK_AHB_BIST 28 72 #define A13_CLK_AHB_MMC0 29 73 #define A13_CLK_AHB_MMC1 30 74 #define A13_CLK_AHB_MMC2 31 75 #define A13_CLK_AHB_NAND 32 76 #define A13_CLK_AHB_SDRAM 33 77 #define A13_CLK_AHB_EMAC 34 78 #define A13_CLK_AHB_TS 35 79 #define A13_CLK_AHB_SPI0 36 80 #define A13_CLK_AHB_SPI1 37 81 #define A13_CLK_AHB_SPI2 38 82 #define A13_CLK_AHB_GPS 39 83 #define A13_CLK_AHB_HSTIMER 40 84 #define A13_CLK_AHB_VE 41 85 #define A13_CLK_AHB_TVE 42 86 #define A13_CLK_AHB_LCD 43 87 #define A13_CLK_AHB_CSI 44 88 #define A13_CLK_AHB_HDMI 45 89 #define A13_CLK_AHB_DE_BE 46 90 #define A13_CLK_AHB_DE_FE 47 91 #define A13_CLK_AHB_IEP 48 92 #define A13_CLK_AHB_GPU 49 93 #define A13_CLK_APB0_CODEC 50 94 #define A13_CLK_APB0_SPDIF 51 95 #define A13_CLK_APB0_I2S 52 96 #define A13_CLK_APB0_PIO 53 97 #define A13_CLK_APB0_IR 54 98 #define A13_CLK_APB0_KEYPAD 55 99 #define A13_CLK_APB1_I2C0 56 100 #define A13_CLK_APB1_I2C1 57 101 #define A13_CLK_APB1_I2C2 58 102 #define A13_CLK_APB1_UART0 59 103 #define A13_CLK_APB1_UART1 60 104 #define A13_CLK_APB1_UART2 61 105 #define A13_CLK_APB1_UART3 62 106 #define A13_CLK_NAND 63 107 #define A13_CLK_MMC0 64 108 #define A13_CLK_MMC1 65 109 #define A13_CLK_MMC2 66 110 #define A13_CLK_TS 67 111 #define A13_CLK_SS 68 112 #define A13_CLK_SPI0 69 113 #define A13_CLK_SPI1 70 114 #define A13_CLK_SPI2 71 115 #define A13_CLK_IR 72 116 #define A13_CLK_I2S 73 117 #define A13_CLK_SPDIF 74 118 #define A13_CLK_KEYPAD 75 119 #define A13_CLK_USB_OHCI 76 120 #define A13_CLK_USB_PHY0 77 121 #define A13_CLK_USB_PHY1 78 122 #define A13_CLK_GPS 79 123 #define A13_CLK_DRAM_VE 80 124 #define A13_CLK_DRAM_CSI 81 125 #define A13_CLK_DRAM_TS 82 126 #define A13_CLK_DRAM_TVE 83 127 #define A13_CLK_DRAM_DE_FE 84 128 #define A13_CLK_DRAM_DE_BE 85 129 #define A13_CLK_DRAM_ACE 86 130 #define A13_CLK_DRAM_IEP 87 131 #define A13_CLK_DE_BE 88 132 #define A13_CLK_DE_FE 89 133 #define A13_CLK_TCON_CH0 90 134 #define A13_CLK_TCON_CH1_SCLK 91 135 #define A13_CLK_TCON_CH1 92 136 #define A13_CLK_CSI 93 137 #define A13_CLK_VE 94 138 #define A13_CLK_CODEC 95 139 #define A13_CLK_AVS 96 140 #define A13_CLK_HDMI 97 141 #define A13_CLK_GPU 98 142 #define A13_CLK_MBUS 99 143 #define A13_CLK_IEP 100 144 145 #endif /* !_SUN5I_A13_CCU_H */ 146