1 /* $NetBSD: sscom_s3c2410.c,v 1.8 2022/09/27 06:36:43 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 * Copyright (c) 2002, 2003 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 * Genetec corporation may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: sscom_s3c2410.c,v 1.8 2022/09/27 06:36:43 skrll Exp $");
37
38 #include "opt_sscom.h"
39 #include "opt_ddb.h"
40 #include "opt_kgdb.h"
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/ioctl.h>
45 #include <sys/select.h>
46 #include <sys/tty.h>
47 #include <sys/proc.h>
48 #include <sys/conf.h>
49 #include <sys/file.h>
50 #include <sys/uio.h>
51 #include <sys/kernel.h>
52 #include <sys/syslog.h>
53 #include <sys/types.h>
54 #include <sys/device.h>
55 #include <sys/timepps.h>
56 #include <sys/vnode.h>
57
58 #include <machine/intr.h>
59 #include <sys/bus.h>
60
61 #include <arm/s3c2xx0/s3c2410reg.h>
62 #include <arm/s3c2xx0/s3c2410var.h>
63 #include <arm/s3c2xx0/sscom_var.h>
64 #include <sys/termios.h>
65
66 static int sscom_match(device_t, cfdata_t, void *);
67 static void sscom_attach(device_t, device_t, void *);
68
69 CFATTACH_DECL_NEW(sscom, sizeof(struct sscom_softc), sscom_match,
70 sscom_attach, NULL, NULL);
71
72 const struct sscom_uart_info s3c2410_uart_config[] = {
73 /* UART 0 */
74 {
75 0,
76 S3C2410_INT_TXD0,
77 S3C2410_INT_RXD0,
78 S3C2410_INT_ERR0,
79 S3C2410_UART_BASE(0),
80 },
81 /* UART 1 */
82 {
83 1,
84 S3C2410_INT_TXD1,
85 S3C2410_INT_RXD1,
86 S3C2410_INT_ERR1,
87 S3C2410_UART_BASE(1),
88 },
89 /* UART 2 */
90 {
91 2,
92 S3C2410_INT_TXD2,
93 S3C2410_INT_RXD2,
94 S3C2410_INT_ERR2,
95 S3C2410_UART_BASE(2),
96 },
97 };
98
99 static int
sscom_match(device_t parent,cfdata_t cf,void * aux)100 sscom_match(device_t parent, cfdata_t cf, void *aux)
101 {
102 struct s3c2xx0_attach_args *sa = aux;
103 int unit = sa->sa_index;
104
105 return unit == 0 || unit == 1;
106 }
107
108 /* RXINTn, TXINTn and ERRn interrupts are cascaded to UARTn irq. */
109
110 #define _sscom_intbit(irqno) (1<<((irqno)-S3C2410_SUBIRQ_MIN))
111
112 static void
s3c2410_change_txrx_interrupts(struct sscom_softc * sc,bool unmask_p,u_int flags)113 s3c2410_change_txrx_interrupts(struct sscom_softc *sc, bool unmask_p,
114 u_int flags)
115 {
116 int intbits = 0;
117 if (flags & SSCOM_HW_RXINT)
118 intbits |= _sscom_intbit((sc)->sc_rx_irqno);
119 if (flags & SSCOM_HW_TXINT)
120 intbits |= _sscom_intbit((sc)->sc_rx_irqno);
121 if (unmask_p) {
122 s3c2410_unmask_subinterrupts(intbits);
123 } else {
124 s3c2410_mask_subinterrupts(intbits);
125 }
126 }
127
128 static void
sscom_attach(device_t parent,device_t self,void * aux)129 sscom_attach(device_t parent, device_t self, void *aux)
130 {
131 struct sscom_softc *sc = device_private(self);
132 struct s3c2xx0_attach_args *sa = aux;
133 int unit = sa->sa_index;
134 bus_addr_t iobase = s3c2410_uart_config[unit].iobase;
135
136 aprint_normal(": UART%d addr=%lx", sa->sa_index, iobase );
137
138 sc->sc_dev = self;
139 sc->sc_iot = s3c2xx0_softc->sc_iot;
140 sc->sc_unit = unit;
141 sc->sc_frequency = s3c2xx0_softc->sc_pclk;
142
143 sc->sc_change_txrx_interrupts = s3c2410_change_txrx_interrupts;
144
145 sc->sc_rx_irqno = s3c2410_uart_config[sa->sa_index].rx_int;
146 sc->sc_tx_irqno = s3c2410_uart_config[sa->sa_index].tx_int;
147
148 if (bus_space_map(sc->sc_iot, iobase, SSCOM_SIZE, 0, &sc->sc_ioh)) {
149 aprint_error( ": failed to map registers\n" );
150 return;
151 }
152
153 printf("\n");
154
155 s3c24x0_intr_establish(s3c2410_uart_config[unit].tx_int,
156 IPL_SERIAL, IST_LEVEL, sscomtxintr, sc);
157 s3c24x0_intr_establish(s3c2410_uart_config[unit].rx_int,
158 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
159 s3c24x0_intr_establish(s3c2410_uart_config[unit].err_int,
160 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
161 sscom_disable_txrxint(sc);
162
163 sscom_attach_subr(sc);
164 }
165
166
167
168 int
s3c2410_sscom_cnattach(bus_space_tag_t iot,int unit,int rate,int frequency,tcflag_t cflag)169 s3c2410_sscom_cnattach(bus_space_tag_t iot, int unit, int rate,
170 int frequency, tcflag_t cflag)
171 {
172 return sscom_cnattach(iot, s3c2410_uart_config + unit,
173 rate, frequency, cflag);
174 }
175
176 #ifdef KGDB
177 int
s3c2410_sscom_kgdb_attach(bus_space_tag_t iot,int unit,int rate,int frequency,tcflag_t cflag)178 s3c2410_sscom_kgdb_attach(bus_space_tag_t iot, int unit, int rate,
179 int frequency, tcflag_t cflag)
180 {
181 return sscom_kgdb_attach(iot, s3c2410_uart_config + unit,
182 rate, frequency, cflag);
183 }
184 #endif /* KGDB */
185