xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/smu8_fusion.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: smu8_fusion.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2014 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 
26 #ifndef SMU8_FUSION_H
27 #define SMU8_FUSION_H
28 
29 #include "smu8.h"
30 
31 #pragma pack(push, 1)
32 
33 #define SMU8_MAX_CUS 2
34 #define SMU8_PSMS_PER_CU 4
35 #define SMU8_CACS_PER_CU 4
36 
37 struct SMU8_GfxCuPgScoreboard {
38     uint8_t Enabled;
39     uint8_t spare[3];
40 };
41 
42 struct SMU8_Port80MonitorTable {
43 	uint32_t MmioAddress;
44 	uint32_t MemoryBaseHi;
45 	uint32_t MemoryBaseLo;
46 	uint16_t MemoryBufferSize;
47 	uint16_t MemoryPosition;
48 	uint16_t PollingInterval;
49 	uint8_t  EnableCsrShadow;
50 	uint8_t  EnableDramShadow;
51 };
52 
53 /*  Display specific power management parameters */
54 #define PWRMGT_SEPARATION_TIME_SHIFT            0
55 #define PWRMGT_SEPARATION_TIME_MASK             0xFFFF
56 #define PWRMGT_DISABLE_CPU_CSTATES_SHIFT        16
57 #define PWRMGT_DISABLE_CPU_CSTATES_MASK         0x1
58 #define PWRMGT_DISABLE_CPU_PSTATES_SHIFT        24
59 #define PWRMGT_DISABLE_CPU_PSTATES_MASK         0x1
60 
61 /* Clock Table Definitions */
62 #define NUM_SCLK_LEVELS     8
63 #define NUM_LCLK_LEVELS     8
64 #define NUM_UVD_LEVELS      8
65 #define NUM_ECLK_LEVELS     8
66 #define NUM_ACLK_LEVELS     8
67 
68 struct SMU8_Fusion_ClkLevel {
69 	uint8_t		GnbVid;
70 	uint8_t		GfxVid;
71 	uint8_t		DfsDid;
72 	uint8_t		DeepSleepDid;
73 	uint32_t	DfsBypass;
74 	uint32_t	Frequency;
75 };
76 
77 struct SMU8_Fusion_SclkBreakdownTable {
78 	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_SCLK_LEVELS];
79 	struct SMU8_Fusion_ClkLevel DpmOffLevel;
80 	/* SMU8_Fusion_ClkLevel PwrOffLevel; */
81 	uint32_t    SclkValidMask;
82 	uint32_t    MaxSclkIndex;
83 };
84 
85 struct SMU8_Fusion_LclkBreakdownTable {
86 	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_LCLK_LEVELS];
87 	struct SMU8_Fusion_ClkLevel DpmOffLevel;
88     /* SMU8_Fusion_ClkLevel PwrOffLevel; */
89 	uint32_t    LclkValidMask;
90 	uint32_t    MaxLclkIndex;
91 };
92 
93 struct SMU8_Fusion_EclkBreakdownTable {
94 	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ECLK_LEVELS];
95 	struct SMU8_Fusion_ClkLevel DpmOffLevel;
96 	struct SMU8_Fusion_ClkLevel PwrOffLevel;
97 	uint32_t    EclkValidMask;
98 	uint32_t    MaxEclkIndex;
99 };
100 
101 struct SMU8_Fusion_VclkBreakdownTable {
102 	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
103 	struct SMU8_Fusion_ClkLevel DpmOffLevel;
104 	struct SMU8_Fusion_ClkLevel PwrOffLevel;
105 	uint32_t    VclkValidMask;
106 	uint32_t    MaxVclkIndex;
107 };
108 
109 struct SMU8_Fusion_DclkBreakdownTable {
110 	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
111 	struct SMU8_Fusion_ClkLevel DpmOffLevel;
112 	struct SMU8_Fusion_ClkLevel PwrOffLevel;
113 	uint32_t    DclkValidMask;
114 	uint32_t    MaxDclkIndex;
115 };
116 
117 struct SMU8_Fusion_AclkBreakdownTable {
118 	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ACLK_LEVELS];
119 	struct SMU8_Fusion_ClkLevel DpmOffLevel;
120 	struct SMU8_Fusion_ClkLevel PwrOffLevel;
121 	uint32_t    AclkValidMask;
122 	uint32_t    MaxAclkIndex;
123 };
124 
125 
126 struct SMU8_Fusion_ClkTable {
127 	struct SMU8_Fusion_SclkBreakdownTable SclkBreakdownTable;
128 	struct SMU8_Fusion_LclkBreakdownTable LclkBreakdownTable;
129 	struct SMU8_Fusion_EclkBreakdownTable EclkBreakdownTable;
130 	struct SMU8_Fusion_VclkBreakdownTable VclkBreakdownTable;
131 	struct SMU8_Fusion_DclkBreakdownTable DclkBreakdownTable;
132 	struct SMU8_Fusion_AclkBreakdownTable AclkBreakdownTable;
133 };
134 
135 #pragma pack(pop)
136 
137 #endif
138