1 /* $NetBSD: smu_7_1_1_d.h,v 1.3 2021/12/18 23:45:23 riastradh Exp $ */ 2 3 /* 4 * SMU_7_1_1 Register documentation 5 * 6 * Copyright (C) 2014 Advanced Micro Devices, Inc. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included 16 * in all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 22 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef SMU_7_1_1_D_H 27 #define SMU_7_1_1_D_H 28 29 #define mmGCK_SMC_IND_INDEX 0x80 30 #define mmGCK0_GCK_SMC_IND_INDEX 0x80 31 #define mmGCK1_GCK_SMC_IND_INDEX 0x82 32 #define mmGCK2_GCK_SMC_IND_INDEX 0x84 33 #define mmGCK3_GCK_SMC_IND_INDEX 0x86 34 #define mmGCK_SMC_IND_DATA 0x81 35 #define mmGCK0_GCK_SMC_IND_DATA 0x81 36 #define mmGCK1_GCK_SMC_IND_DATA 0x83 37 #define mmGCK2_GCK_SMC_IND_DATA 0x85 38 #define mmGCK3_GCK_SMC_IND_DATA 0x87 39 #define ixCG_DCLK_CNTL 0xc050009c 40 #define ixCG_DCLK_STATUS 0xc05000a0 41 #define ixCG_VCLK_CNTL 0xc05000a4 42 #define ixCG_VCLK_STATUS 0xc05000a8 43 #define ixCG_ECLK_CNTL 0xc05000ac 44 #define ixCG_ECLK_STATUS 0xc05000b0 45 #define ixCG_ACLK_CNTL 0xc05000dc 46 #define ixGCK_DFS_BYPASS_CNTL 0xc0500118 47 #define ixCG_SPLL_FUNC_CNTL 0xc0500140 48 #define ixCG_SPLL_FUNC_CNTL_2 0xc0500144 49 #define ixCG_SPLL_FUNC_CNTL_3 0xc0500148 50 #define ixCG_SPLL_FUNC_CNTL_4 0xc050014c 51 #define ixCG_SPLL_FUNC_CNTL_5 0xc0500150 52 #define ixCG_SPLL_FUNC_CNTL_6 0xc0500154 53 #define ixCG_SPLL_FUNC_CNTL_7 0xc0500158 54 #define ixSPLL_CNTL_MODE 0xc0500160 55 #define ixCG_SPLL_SPREAD_SPECTRUM 0xc0500164 56 #define ixCG_SPLL_SPREAD_SPECTRUM_2 0xc0500168 57 #define ixMPLL_BYPASSCLK_SEL 0xc050019c 58 #define ixCG_CLKPIN_CNTL 0xc05001a0 59 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 60 #define ixCG_CLKPIN_CNTL_DC 0xc0500204 61 #define ixTHM_CLK_CNTL 0xc05001a8 62 #define ixMISC_CLK_CTRL 0xc05001ac 63 #define ixGCK_PLL_TEST_CNTL 0xc05001c0 64 #define ixGCK_PLL_TEST_CNTL_2 0xc05001c4 65 #define ixGCK_ADFS_CLK_BYPASS_CNTL1 0xc05001c8 66 #define mmSMC_IND_INDEX 0x80 67 #define mmSMC0_SMC_IND_INDEX 0x80 68 #define mmSMC1_SMC_IND_INDEX 0x82 69 #define mmSMC2_SMC_IND_INDEX 0x84 70 #define mmSMC3_SMC_IND_INDEX 0x86 71 #define mmSMC_IND_DATA 0x81 72 #define mmSMC0_SMC_IND_DATA 0x81 73 #define mmSMC1_SMC_IND_DATA 0x83 74 #define mmSMC2_SMC_IND_DATA 0x85 75 #define mmSMC3_SMC_IND_DATA 0x87 76 #define mmSMC_IND_INDEX_0 0x80 77 #define mmSMC_IND_DATA_0 0x81 78 #define mmSMC_IND_INDEX_1 0x82 79 #define mmSMC_IND_DATA_1 0x83 80 #define mmSMC_IND_INDEX_2 0x84 81 #define mmSMC_IND_DATA_2 0x85 82 #define mmSMC_IND_INDEX_3 0x86 83 #define mmSMC_IND_DATA_3 0x87 84 #define mmSMC_IND_INDEX_4 0x88 85 #define mmSMC_IND_DATA_4 0x89 86 #define mmSMC_IND_INDEX_5 0x8a 87 #define mmSMC_IND_DATA_5 0x8b 88 #define mmSMC_IND_INDEX_6 0x8c 89 #define mmSMC_IND_DATA_6 0x8d 90 #define mmSMC_IND_INDEX_7 0x8e 91 #define mmSMC_IND_DATA_7 0x8f 92 #define mmSMC_IND_ACCESS_CNTL 0x92 93 #define mmSMC_MESSAGE_0 0x94 94 #define mmSMC_RESP_0 0x95 95 #define mmSMC_MESSAGE_1 0x96 96 #define mmSMC_RESP_1 0x97 97 #define mmSMC_MESSAGE_2 0x98 98 #define mmSMC_RESP_2 0x99 99 #define mmSMC_MESSAGE_3 0x9a 100 #define mmSMC_RESP_3 0x9b 101 #define mmSMC_MESSAGE_4 0x9c 102 #define mmSMC_RESP_4 0x9d 103 #define mmSMC_MESSAGE_5 0x9e 104 #define mmSMC_RESP_5 0x9f 105 #define mmSMC_MESSAGE_6 0xa0 106 #define mmSMC_RESP_6 0xa1 107 #define mmSMC_MESSAGE_7 0xa2 108 #define mmSMC_RESP_7 0xa3 109 #define mmSMC_MSG_ARG_0 0xa4 110 #define mmSMC_MSG_ARG_1 0xa5 111 #define mmSMC_MSG_ARG_2 0xa6 112 #define mmSMC_MSG_ARG_3 0xa7 113 #define mmSMC_MSG_ARG_4 0xa8 114 #define mmSMC_MSG_ARG_5 0xa9 115 #define mmSMC_MSG_ARG_6 0xaa 116 #define mmSMC_MSG_ARG_7 0xab 117 #define mmSMC_MESSAGE_8 0xb5 118 #define mmSMC_RESP_8 0xb6 119 #define mmSMC_MESSAGE_9 0xb7 120 #define mmSMC_RESP_9 0xb8 121 #define mmSMC_MESSAGE_10 0xb9 122 #define mmSMC_RESP_10 0xba 123 #define mmSMC_MESSAGE_11 0xbb 124 #define mmSMC_RESP_11 0xbc 125 #define mmSMC_MSG_ARG_8 0xbd 126 #define mmSMC_MSG_ARG_9 0xbe 127 #define mmSMC_MSG_ARG_10 0xbf 128 #define mmSMC_MSG_ARG_11 0x93 129 #define ixSMC_SYSCON_RESET_CNTL 0x80000000 130 #define ixSMC_SYSCON_CLOCK_CNTL_0 0x80000004 131 #define ixSMC_SYSCON_CLOCK_CNTL_1 0x80000008 132 #define ixSMC_SYSCON_CLOCK_CNTL_2 0x8000000c 133 #define ixSMC_SYSCON_MISC_CNTL 0x80000010 134 #define ixSMC_SYSCON_MSG_ARG_0 0x80000068 135 #define ixSMC_PC_C 0x80000370 136 #define ixSMC_SCRATCH9 0x80000424 137 #define mmGPIOPAD_SW_INT_STAT 0x180 138 #define mmGPIOPAD_STRENGTH 0x181 139 #define mmGPIOPAD_MASK 0x182 140 #define mmGPIOPAD_A 0x183 141 #define mmGPIOPAD_EN 0x184 142 #define mmGPIOPAD_Y 0x185 143 #define mmGPIOPAD_PINSTRAPS 0x186 144 #define mmGPIOPAD_INT_STAT_EN 0x187 145 #define mmGPIOPAD_INT_STAT 0x188 146 #define mmGPIOPAD_INT_STAT_AK 0x189 147 #define mmGPIOPAD_INT_EN 0x18a 148 #define mmGPIOPAD_INT_TYPE 0x18b 149 #define mmGPIOPAD_INT_POLARITY 0x18c 150 #define mmGPIOPAD_EXTERN_TRIG_CNTL 0x18d 151 #define mmGPIOPAD_RCVR_SEL 0x191 152 #define mmGPIOPAD_PU_EN 0x192 153 #define mmGPIOPAD_PD_EN 0x193 154 #define mmCG_FPS_CNT 0x1b6 155 #define mmSMU_IND_INDEX_0 0x1a6 156 #define mmSMU_IND_DATA_0 0x1a7 157 #define mmSMU_IND_INDEX_1 0x1a8 158 #define mmSMU_IND_DATA_1 0x1a9 159 #define mmSMU_IND_INDEX_2 0x1aa 160 #define mmSMU_IND_DATA_2 0x1ab 161 #define mmSMU_IND_INDEX_3 0x1ac 162 #define mmSMU_IND_DATA_3 0x1ad 163 #define mmSMU_IND_INDEX_4 0x1ae 164 #define mmSMU_IND_DATA_4 0x1af 165 #define mmSMU_IND_INDEX_5 0x1b0 166 #define mmSMU_IND_DATA_5 0x1b1 167 #define mmSMU_IND_INDEX_6 0x1b2 168 #define mmSMU_IND_DATA_6 0x1b3 169 #define mmSMU_IND_INDEX_7 0x1b4 170 #define mmSMU_IND_DATA_7 0x1b5 171 #define mmSMU_SMC_IND_INDEX 0x80 172 #define mmSMU0_SMU_SMC_IND_INDEX 0x80 173 #define mmSMU1_SMU_SMC_IND_INDEX 0x82 174 #define mmSMU2_SMU_SMC_IND_INDEX 0x84 175 #define mmSMU3_SMU_SMC_IND_INDEX 0x86 176 #define mmSMU_SMC_IND_DATA 0x81 177 #define mmSMU0_SMU_SMC_IND_DATA 0x81 178 #define mmSMU1_SMU_SMC_IND_DATA 0x83 179 #define mmSMU2_SMU_SMC_IND_DATA 0x85 180 #define mmSMU3_SMU_SMC_IND_DATA 0x87 181 #define mmSMC_IND_INDEX_11 0x1AC 182 #define mmSMC_IND_DATA_11 0x1AD 183 #define ixRCU_UC_EVENTS 0xc0000004 184 #define ixRCU_MISC_CTRL 0xc0000010 185 #define ixCC_RCU_FUSES 0xc00c0000 186 #define ixCC_SMU_MISC_FUSES 0xc00c0004 187 #define ixCC_SCLK_VID_FUSES 0xc00c0008 188 #define ixCC_GIO_IOCCFG_FUSES 0xc00c000c 189 #define ixCC_GIO_IOC_FUSES 0xc00c0010 190 #define ixCC_SMU_TST_EFUSE1_MISC 0xc00c001c 191 #define ixCC_TST_ID_STRAPS 0xc00c0020 192 #define ixCC_FCTRL_FUSES 0xc00c0024 193 #define ixCC_HARVEST_FUSES 0xc00c0028 194 #define ixSMU_MAIN_PLL_OP_FREQ 0xe0003020 195 #define ixSMU_STATUS 0xe0003088 196 #define ixSMU_FIRMWARE 0xe00030a4 197 #define ixSMU_INPUT_DATA 0xe00030b8 198 #define ixSMU_EFUSE_0 0xc0100000 199 #define ixMCARB_DRAM_TIMING_TABLE_1 0x33018 200 #define ixMCARB_DRAM_TIMING_TABLE_2 0x3301c 201 #define ixMCARB_DRAM_TIMING_TABLE_3 0x33020 202 #define ixMCARB_DRAM_TIMING_TABLE_4 0x33024 203 #define ixMCARB_DRAM_TIMING_TABLE_5 0x33028 204 #define ixMCARB_DRAM_TIMING_TABLE_6 0x3302c 205 #define ixMCARB_DRAM_TIMING_TABLE_7 0x33030 206 #define ixMCARB_DRAM_TIMING_TABLE_8 0x33034 207 #define ixMCARB_DRAM_TIMING_TABLE_9 0x33038 208 #define ixMCARB_DRAM_TIMING_TABLE_10 0x3303c 209 #define ixMCARB_DRAM_TIMING_TABLE_11 0x33040 210 #define ixMCARB_DRAM_TIMING_TABLE_12 0x33044 211 #define ixMCARB_DRAM_TIMING_TABLE_13 0x33048 212 #define ixMCARB_DRAM_TIMING_TABLE_14 0x3304c 213 #define ixMCARB_DRAM_TIMING_TABLE_15 0x33050 214 #define ixMCARB_DRAM_TIMING_TABLE_16 0x33054 215 #define ixMCARB_DRAM_TIMING_TABLE_17 0x33058 216 #define ixMCARB_DRAM_TIMING_TABLE_18 0x3305c 217 #define ixMCARB_DRAM_TIMING_TABLE_19 0x33060 218 #define ixMCARB_DRAM_TIMING_TABLE_20 0x33064 219 #define ixMCARB_DRAM_TIMING_TABLE_21 0x33068 220 #define ixMCARB_DRAM_TIMING_TABLE_22 0x3306c 221 #define ixMCARB_DRAM_TIMING_TABLE_23 0x33070 222 #define ixMCARB_DRAM_TIMING_TABLE_24 0x33074 223 #define ixMCARB_DRAM_TIMING_TABLE_25 0x33078 224 #define ixMCARB_DRAM_TIMING_TABLE_26 0x3307c 225 #define ixMCARB_DRAM_TIMING_TABLE_27 0x33080 226 #define ixMCARB_DRAM_TIMING_TABLE_28 0x33084 227 #define ixMCARB_DRAM_TIMING_TABLE_29 0x33088 228 #define ixMCARB_DRAM_TIMING_TABLE_30 0x3308c 229 #define ixMCARB_DRAM_TIMING_TABLE_31 0x33090 230 #define ixMCARB_DRAM_TIMING_TABLE_32 0x33094 231 #define ixMCARB_DRAM_TIMING_TABLE_33 0x33098 232 #define ixMCARB_DRAM_TIMING_TABLE_34 0x3309c 233 #define ixMCARB_DRAM_TIMING_TABLE_35 0x330a0 234 #define ixMCARB_DRAM_TIMING_TABLE_36 0x330a4 235 #define ixMCARB_DRAM_TIMING_TABLE_37 0x330a8 236 #define ixMCARB_DRAM_TIMING_TABLE_38 0x330ac 237 #define ixMCARB_DRAM_TIMING_TABLE_39 0x330b0 238 #define ixMCARB_DRAM_TIMING_TABLE_40 0x330b4 239 #define ixMCARB_DRAM_TIMING_TABLE_41 0x330b8 240 #define ixMCARB_DRAM_TIMING_TABLE_42 0x330bc 241 #define ixMCARB_DRAM_TIMING_TABLE_43 0x330c0 242 #define ixMCARB_DRAM_TIMING_TABLE_44 0x330c4 243 #define ixMCARB_DRAM_TIMING_TABLE_45 0x330c8 244 #define ixMCARB_DRAM_TIMING_TABLE_46 0x330cc 245 #define ixMCARB_DRAM_TIMING_TABLE_47 0x330d0 246 #define ixMCARB_DRAM_TIMING_TABLE_48 0x330d4 247 #define ixMCARB_DRAM_TIMING_TABLE_49 0x330d8 248 #define ixMCARB_DRAM_TIMING_TABLE_50 0x330dc 249 #define ixMCARB_DRAM_TIMING_TABLE_51 0x330e0 250 #define ixMCARB_DRAM_TIMING_TABLE_52 0x330e4 251 #define ixMCARB_DRAM_TIMING_TABLE_53 0x330e8 252 #define ixMCARB_DRAM_TIMING_TABLE_54 0x330ec 253 #define ixMCARB_DRAM_TIMING_TABLE_55 0x330f0 254 #define ixMCARB_DRAM_TIMING_TABLE_56 0x330f4 255 #define ixMCARB_DRAM_TIMING_TABLE_57 0x330f8 256 #define ixMCARB_DRAM_TIMING_TABLE_58 0x330fc 257 #define ixMCARB_DRAM_TIMING_TABLE_59 0x33100 258 #define ixMCARB_DRAM_TIMING_TABLE_60 0x33104 259 #define ixMCARB_DRAM_TIMING_TABLE_61 0x33108 260 #define ixMCARB_DRAM_TIMING_TABLE_62 0x3310c 261 #define ixMCARB_DRAM_TIMING_TABLE_63 0x33110 262 #define ixMCARB_DRAM_TIMING_TABLE_64 0x33114 263 #define ixMCARB_DRAM_TIMING_TABLE_65 0x33118 264 #define ixMCARB_DRAM_TIMING_TABLE_66 0x3311c 265 #define ixMCARB_DRAM_TIMING_TABLE_67 0x33120 266 #define ixMCARB_DRAM_TIMING_TABLE_68 0x33124 267 #define ixMCARB_DRAM_TIMING_TABLE_69 0x33128 268 #define ixMCARB_DRAM_TIMING_TABLE_70 0x3312c 269 #define ixMCARB_DRAM_TIMING_TABLE_71 0x33130 270 #define ixMCARB_DRAM_TIMING_TABLE_72 0x33134 271 #define ixMCARB_DRAM_TIMING_TABLE_73 0x33138 272 #define ixMCARB_DRAM_TIMING_TABLE_74 0x3313c 273 #define ixMCARB_DRAM_TIMING_TABLE_75 0x33140 274 #define ixMCARB_DRAM_TIMING_TABLE_76 0x33144 275 #define ixMCARB_DRAM_TIMING_TABLE_77 0x33148 276 #define ixMCARB_DRAM_TIMING_TABLE_78 0x3314c 277 #define ixMCARB_DRAM_TIMING_TABLE_79 0x33150 278 #define ixMCARB_DRAM_TIMING_TABLE_80 0x33154 279 #define ixMCARB_DRAM_TIMING_TABLE_81 0x33158 280 #define ixMCARB_DRAM_TIMING_TABLE_82 0x3315c 281 #define ixMCARB_DRAM_TIMING_TABLE_83 0x33160 282 #define ixMCARB_DRAM_TIMING_TABLE_84 0x33164 283 #define ixMCARB_DRAM_TIMING_TABLE_85 0x33168 284 #define ixMCARB_DRAM_TIMING_TABLE_86 0x3316c 285 #define ixMCARB_DRAM_TIMING_TABLE_87 0x33170 286 #define ixMCARB_DRAM_TIMING_TABLE_88 0x33174 287 #define ixMCARB_DRAM_TIMING_TABLE_89 0x33178 288 #define ixMCARB_DRAM_TIMING_TABLE_90 0x3317c 289 #define ixMCARB_DRAM_TIMING_TABLE_91 0x33180 290 #define ixMCARB_DRAM_TIMING_TABLE_92 0x33184 291 #define ixMCARB_DRAM_TIMING_TABLE_93 0x33188 292 #define ixMCARB_DRAM_TIMING_TABLE_94 0x3318c 293 #define ixMCARB_DRAM_TIMING_TABLE_95 0x33190 294 #define ixMCARB_DRAM_TIMING_TABLE_96 0x33194 295 #define ixMC_REGISTERS_TABLE_1 0x33198 296 #define ixMC_REGISTERS_TABLE_2 0x3319c 297 #define ixMC_REGISTERS_TABLE_3 0x331a0 298 #define ixMC_REGISTERS_TABLE_4 0x331a4 299 #define ixMC_REGISTERS_TABLE_5 0x331a8 300 #define ixMC_REGISTERS_TABLE_6 0x331ac 301 #define ixMC_REGISTERS_TABLE_7 0x331b0 302 #define ixMC_REGISTERS_TABLE_8 0x331b4 303 #define ixMC_REGISTERS_TABLE_9 0x331b8 304 #define ixMC_REGISTERS_TABLE_10 0x331bc 305 #define ixMC_REGISTERS_TABLE_11 0x331c0 306 #define ixMC_REGISTERS_TABLE_12 0x331c4 307 #define ixMC_REGISTERS_TABLE_13 0x331c8 308 #define ixMC_REGISTERS_TABLE_14 0x331cc 309 #define ixMC_REGISTERS_TABLE_15 0x331d0 310 #define ixMC_REGISTERS_TABLE_16 0x331d4 311 #define ixMC_REGISTERS_TABLE_17 0x331d8 312 #define ixMC_REGISTERS_TABLE_18 0x331dc 313 #define ixMC_REGISTERS_TABLE_19 0x331e0 314 #define ixMC_REGISTERS_TABLE_20 0x331e4 315 #define ixMC_REGISTERS_TABLE_21 0x331e8 316 #define ixMC_REGISTERS_TABLE_22 0x331ec 317 #define ixMC_REGISTERS_TABLE_23 0x331f0 318 #define ixMC_REGISTERS_TABLE_24 0x331f4 319 #define ixMC_REGISTERS_TABLE_25 0x331f8 320 #define ixMC_REGISTERS_TABLE_26 0x331fc 321 #define ixMC_REGISTERS_TABLE_27 0x33200 322 #define ixMC_REGISTERS_TABLE_28 0x33204 323 #define ixMC_REGISTERS_TABLE_29 0x33208 324 #define ixMC_REGISTERS_TABLE_30 0x3320c 325 #define ixMC_REGISTERS_TABLE_31 0x33210 326 #define ixMC_REGISTERS_TABLE_32 0x33214 327 #define ixMC_REGISTERS_TABLE_33 0x33218 328 #define ixMC_REGISTERS_TABLE_34 0x3321c 329 #define ixMC_REGISTERS_TABLE_35 0x33220 330 #define ixMC_REGISTERS_TABLE_36 0x33224 331 #define ixMC_REGISTERS_TABLE_37 0x33228 332 #define ixMC_REGISTERS_TABLE_38 0x3322c 333 #define ixMC_REGISTERS_TABLE_39 0x33230 334 #define ixMC_REGISTERS_TABLE_40 0x33234 335 #define ixMC_REGISTERS_TABLE_41 0x33238 336 #define ixMC_REGISTERS_TABLE_42 0x3323c 337 #define ixMC_REGISTERS_TABLE_43 0x33240 338 #define ixMC_REGISTERS_TABLE_44 0x33244 339 #define ixMC_REGISTERS_TABLE_45 0x33248 340 #define ixMC_REGISTERS_TABLE_46 0x3324c 341 #define ixMC_REGISTERS_TABLE_47 0x33250 342 #define ixMC_REGISTERS_TABLE_48 0x33254 343 #define ixMC_REGISTERS_TABLE_49 0x33258 344 #define ixMC_REGISTERS_TABLE_50 0x3325c 345 #define ixMC_REGISTERS_TABLE_51 0x33260 346 #define ixMC_REGISTERS_TABLE_52 0x33264 347 #define ixMC_REGISTERS_TABLE_53 0x33268 348 #define ixMC_REGISTERS_TABLE_54 0x3326c 349 #define ixMC_REGISTERS_TABLE_55 0x33270 350 #define ixMC_REGISTERS_TABLE_56 0x33274 351 #define ixMC_REGISTERS_TABLE_57 0x33278 352 #define ixMC_REGISTERS_TABLE_58 0x3327c 353 #define ixMC_REGISTERS_TABLE_59 0x33280 354 #define ixMC_REGISTERS_TABLE_60 0x33284 355 #define ixMC_REGISTERS_TABLE_61 0x33288 356 #define ixMC_REGISTERS_TABLE_62 0x3328c 357 #define ixMC_REGISTERS_TABLE_63 0x33290 358 #define ixMC_REGISTERS_TABLE_64 0x33294 359 #define ixMC_REGISTERS_TABLE_65 0x33298 360 #define ixMC_REGISTERS_TABLE_66 0x3329c 361 #define ixMC_REGISTERS_TABLE_67 0x332a0 362 #define ixMC_REGISTERS_TABLE_68 0x332a4 363 #define ixMC_REGISTERS_TABLE_69 0x332a8 364 #define ixMC_REGISTERS_TABLE_70 0x332ac 365 #define ixMC_REGISTERS_TABLE_71 0x332b0 366 #define ixMC_REGISTERS_TABLE_72 0x332b4 367 #define ixMC_REGISTERS_TABLE_73 0x332b8 368 #define ixMC_REGISTERS_TABLE_74 0x332bc 369 #define ixMC_REGISTERS_TABLE_75 0x332c0 370 #define ixMC_REGISTERS_TABLE_76 0x332c4 371 #define ixMC_REGISTERS_TABLE_77 0x332c8 372 #define ixMC_REGISTERS_TABLE_78 0x332cc 373 #define ixMC_REGISTERS_TABLE_79 0x332d0 374 #define ixMC_REGISTERS_TABLE_80 0x332d4 375 #define ixMC_REGISTERS_TABLE_81 0x332d8 376 #define ixDPM_TABLE_1 0x332dc 377 #define ixDPM_TABLE_2 0x332e0 378 #define ixDPM_TABLE_3 0x332e4 379 #define ixDPM_TABLE_4 0x332e8 380 #define ixDPM_TABLE_5 0x332ec 381 #define ixDPM_TABLE_6 0x332f0 382 #define ixDPM_TABLE_7 0x332f4 383 #define ixDPM_TABLE_8 0x332f8 384 #define ixDPM_TABLE_9 0x332fc 385 #define ixDPM_TABLE_10 0x33300 386 #define ixDPM_TABLE_11 0x33304 387 #define ixDPM_TABLE_12 0x33308 388 #define ixDPM_TABLE_13 0x3330c 389 #define ixDPM_TABLE_14 0x33310 390 #define ixDPM_TABLE_15 0x33314 391 #define ixDPM_TABLE_16 0x33318 392 #define ixDPM_TABLE_17 0x3331c 393 #define ixDPM_TABLE_18 0x33320 394 #define ixDPM_TABLE_19 0x33324 395 #define ixDPM_TABLE_20 0x33328 396 #define ixDPM_TABLE_21 0x3332c 397 #define ixDPM_TABLE_22 0x33330 398 #define ixDPM_TABLE_23 0x33334 399 #define ixDPM_TABLE_24 0x33338 400 #define ixDPM_TABLE_25 0x3333c 401 #define ixDPM_TABLE_26 0x33340 402 #define ixDPM_TABLE_27 0x33344 403 #define ixDPM_TABLE_28 0x33348 404 #define ixDPM_TABLE_29 0x3334c 405 #define ixDPM_TABLE_30 0x33350 406 #define ixDPM_TABLE_31 0x33354 407 #define ixDPM_TABLE_32 0x33358 408 #define ixDPM_TABLE_33 0x3335c 409 #define ixDPM_TABLE_34 0x33360 410 #define ixDPM_TABLE_35 0x33364 411 #define ixDPM_TABLE_36 0x33368 412 #define ixDPM_TABLE_37 0x3336c 413 #define ixDPM_TABLE_38 0x33370 414 #define ixDPM_TABLE_39 0x33374 415 #define ixDPM_TABLE_40 0x33378 416 #define ixDPM_TABLE_41 0x3337c 417 #define ixDPM_TABLE_42 0x33380 418 #define ixDPM_TABLE_43 0x33384 419 #define ixDPM_TABLE_44 0x33388 420 #define ixDPM_TABLE_45 0x3338c 421 #define ixDPM_TABLE_46 0x33390 422 #define ixDPM_TABLE_47 0x33394 423 #define ixDPM_TABLE_48 0x33398 424 #define ixDPM_TABLE_49 0x3339c 425 #define ixDPM_TABLE_50 0x333a0 426 #define ixDPM_TABLE_51 0x333a4 427 #define ixDPM_TABLE_52 0x333a8 428 #define ixDPM_TABLE_53 0x333ac 429 #define ixDPM_TABLE_54 0x333b0 430 #define ixDPM_TABLE_55 0x333b4 431 #define ixDPM_TABLE_56 0x333b8 432 #define ixDPM_TABLE_57 0x333bc 433 #define ixDPM_TABLE_58 0x333c0 434 #define ixDPM_TABLE_59 0x333c4 435 #define ixDPM_TABLE_60 0x333c8 436 #define ixDPM_TABLE_61 0x333cc 437 #define ixDPM_TABLE_62 0x333d0 438 #define ixDPM_TABLE_63 0x333d4 439 #define ixDPM_TABLE_64 0x333d8 440 #define ixDPM_TABLE_65 0x333dc 441 #define ixDPM_TABLE_66 0x333e0 442 #define ixDPM_TABLE_67 0x333e4 443 #define ixDPM_TABLE_68 0x333e8 444 #define ixDPM_TABLE_69 0x333ec 445 #define ixDPM_TABLE_70 0x333f0 446 #define ixDPM_TABLE_71 0x333f4 447 #define ixDPM_TABLE_72 0x333f8 448 #define ixDPM_TABLE_73 0x333fc 449 #define ixDPM_TABLE_74 0x33400 450 #define ixDPM_TABLE_75 0x33404 451 #define ixDPM_TABLE_76 0x33408 452 #define ixDPM_TABLE_77 0x3340c 453 #define ixDPM_TABLE_78 0x33410 454 #define ixDPM_TABLE_79 0x33414 455 #define ixDPM_TABLE_80 0x33418 456 #define ixDPM_TABLE_81 0x3341c 457 #define ixDPM_TABLE_82 0x33420 458 #define ixDPM_TABLE_83 0x33424 459 #define ixDPM_TABLE_84 0x33428 460 #define ixDPM_TABLE_85 0x3342c 461 #define ixDPM_TABLE_86 0x33430 462 #define ixDPM_TABLE_87 0x33434 463 #define ixDPM_TABLE_88 0x33438 464 #define ixDPM_TABLE_89 0x3343c 465 #define ixDPM_TABLE_90 0x33440 466 #define ixDPM_TABLE_91 0x33444 467 #define ixDPM_TABLE_92 0x33448 468 #define ixDPM_TABLE_93 0x3344c 469 #define ixDPM_TABLE_94 0x33450 470 #define ixDPM_TABLE_95 0x33454 471 #define ixDPM_TABLE_96 0x33458 472 #define ixDPM_TABLE_97 0x3345c 473 #define ixDPM_TABLE_98 0x33460 474 #define ixDPM_TABLE_99 0x33464 475 #define ixDPM_TABLE_100 0x33468 476 #define ixDPM_TABLE_101 0x3346c 477 #define ixDPM_TABLE_102 0x33470 478 #define ixDPM_TABLE_103 0x33474 479 #define ixDPM_TABLE_104 0x33478 480 #define ixDPM_TABLE_105 0x3347c 481 #define ixDPM_TABLE_106 0x33480 482 #define ixDPM_TABLE_107 0x33484 483 #define ixDPM_TABLE_108 0x33488 484 #define ixDPM_TABLE_109 0x3348c 485 #define ixDPM_TABLE_110 0x33490 486 #define ixDPM_TABLE_111 0x33494 487 #define ixDPM_TABLE_112 0x33498 488 #define ixDPM_TABLE_113 0x3349c 489 #define ixDPM_TABLE_114 0x334a0 490 #define ixDPM_TABLE_115 0x334a4 491 #define ixDPM_TABLE_116 0x334a8 492 #define ixDPM_TABLE_117 0x334ac 493 #define ixDPM_TABLE_118 0x334b0 494 #define ixDPM_TABLE_119 0x334b4 495 #define ixDPM_TABLE_120 0x334b8 496 #define ixDPM_TABLE_121 0x334bc 497 #define ixDPM_TABLE_122 0x334c0 498 #define ixDPM_TABLE_123 0x334c4 499 #define ixDPM_TABLE_124 0x334c8 500 #define ixDPM_TABLE_125 0x334cc 501 #define ixDPM_TABLE_126 0x334d0 502 #define ixDPM_TABLE_127 0x334d4 503 #define ixDPM_TABLE_128 0x334d8 504 #define ixDPM_TABLE_129 0x334dc 505 #define ixDPM_TABLE_130 0x334e0 506 #define ixDPM_TABLE_131 0x334e4 507 #define ixDPM_TABLE_132 0x334e8 508 #define ixDPM_TABLE_133 0x334ec 509 #define ixDPM_TABLE_134 0x334f0 510 #define ixDPM_TABLE_135 0x334f4 511 #define ixDPM_TABLE_136 0x334f8 512 #define ixDPM_TABLE_137 0x334fc 513 #define ixDPM_TABLE_138 0x33500 514 #define ixDPM_TABLE_139 0x33504 515 #define ixDPM_TABLE_140 0x33508 516 #define ixDPM_TABLE_141 0x3350c 517 #define ixDPM_TABLE_142 0x33510 518 #define ixDPM_TABLE_143 0x33514 519 #define ixDPM_TABLE_144 0x33518 520 #define ixDPM_TABLE_145 0x3351c 521 #define ixDPM_TABLE_146 0x33520 522 #define ixDPM_TABLE_147 0x33524 523 #define ixDPM_TABLE_148 0x33528 524 #define ixDPM_TABLE_149 0x3352c 525 #define ixDPM_TABLE_150 0x33530 526 #define ixDPM_TABLE_151 0x33534 527 #define ixDPM_TABLE_152 0x33538 528 #define ixDPM_TABLE_153 0x3353c 529 #define ixDPM_TABLE_154 0x33540 530 #define ixDPM_TABLE_155 0x33544 531 #define ixDPM_TABLE_156 0x33548 532 #define ixDPM_TABLE_157 0x3354c 533 #define ixDPM_TABLE_158 0x33550 534 #define ixDPM_TABLE_159 0x33554 535 #define ixDPM_TABLE_160 0x33558 536 #define ixDPM_TABLE_161 0x3355c 537 #define ixDPM_TABLE_162 0x33560 538 #define ixDPM_TABLE_163 0x33564 539 #define ixDPM_TABLE_164 0x33568 540 #define ixDPM_TABLE_165 0x3356c 541 #define ixDPM_TABLE_166 0x33570 542 #define ixDPM_TABLE_167 0x33574 543 #define ixDPM_TABLE_168 0x33578 544 #define ixDPM_TABLE_169 0x3357c 545 #define ixDPM_TABLE_170 0x33580 546 #define ixDPM_TABLE_171 0x33584 547 #define ixDPM_TABLE_172 0x33588 548 #define ixDPM_TABLE_173 0x3358c 549 #define ixDPM_TABLE_174 0x33590 550 #define ixDPM_TABLE_175 0x33594 551 #define ixDPM_TABLE_176 0x33598 552 #define ixDPM_TABLE_177 0x3359c 553 #define ixDPM_TABLE_178 0x335a0 554 #define ixDPM_TABLE_179 0x335a4 555 #define ixDPM_TABLE_180 0x335a8 556 #define ixDPM_TABLE_181 0x335ac 557 #define ixDPM_TABLE_182 0x335b0 558 #define ixDPM_TABLE_183 0x335b4 559 #define ixDPM_TABLE_184 0x335b8 560 #define ixDPM_TABLE_185 0x335bc 561 #define ixDPM_TABLE_186 0x335c0 562 #define ixDPM_TABLE_187 0x335c4 563 #define ixDPM_TABLE_188 0x335c8 564 #define ixDPM_TABLE_189 0x335cc 565 #define ixDPM_TABLE_190 0x335d0 566 #define ixDPM_TABLE_191 0x335d4 567 #define ixDPM_TABLE_192 0x335d8 568 #define ixDPM_TABLE_193 0x335dc 569 #define ixDPM_TABLE_194 0x335e0 570 #define ixDPM_TABLE_195 0x335e4 571 #define ixDPM_TABLE_196 0x335e8 572 #define ixDPM_TABLE_197 0x335ec 573 #define ixDPM_TABLE_198 0x335f0 574 #define ixDPM_TABLE_199 0x335f4 575 #define ixDPM_TABLE_200 0x335f8 576 #define ixDPM_TABLE_201 0x335fc 577 #define ixDPM_TABLE_202 0x33600 578 #define ixDPM_TABLE_203 0x33604 579 #define ixDPM_TABLE_204 0x33608 580 #define ixDPM_TABLE_205 0x3360c 581 #define ixDPM_TABLE_206 0x33610 582 #define ixDPM_TABLE_207 0x33614 583 #define ixDPM_TABLE_208 0x33618 584 #define ixDPM_TABLE_209 0x3361c 585 #define ixDPM_TABLE_210 0x33620 586 #define ixDPM_TABLE_211 0x33624 587 #define ixDPM_TABLE_212 0x33628 588 #define ixDPM_TABLE_213 0x3362c 589 #define ixDPM_TABLE_214 0x33630 590 #define ixDPM_TABLE_215 0x33634 591 #define ixDPM_TABLE_216 0x33638 592 #define ixDPM_TABLE_217 0x3363c 593 #define ixDPM_TABLE_218 0x33640 594 #define ixDPM_TABLE_219 0x33644 595 #define ixDPM_TABLE_220 0x33648 596 #define ixDPM_TABLE_221 0x3364c 597 #define ixDPM_TABLE_222 0x33650 598 #define ixDPM_TABLE_223 0x33654 599 #define ixDPM_TABLE_224 0x33658 600 #define ixDPM_TABLE_225 0x3365c 601 #define ixDPM_TABLE_226 0x33660 602 #define ixDPM_TABLE_227 0x33664 603 #define ixDPM_TABLE_228 0x33668 604 #define ixDPM_TABLE_229 0x3366c 605 #define ixDPM_TABLE_230 0x33670 606 #define ixDPM_TABLE_231 0x33674 607 #define ixDPM_TABLE_232 0x33678 608 #define ixDPM_TABLE_233 0x3367c 609 #define ixDPM_TABLE_234 0x33680 610 #define ixDPM_TABLE_235 0x33684 611 #define ixDPM_TABLE_236 0x33688 612 #define ixDPM_TABLE_237 0x3368c 613 #define ixDPM_TABLE_238 0x33690 614 #define ixDPM_TABLE_239 0x33694 615 #define ixDPM_TABLE_240 0x33698 616 #define ixDPM_TABLE_241 0x3369c 617 #define ixDPM_TABLE_242 0x336a0 618 #define ixDPM_TABLE_243 0x336a4 619 #define ixDPM_TABLE_244 0x336a8 620 #define ixDPM_TABLE_245 0x336ac 621 #define ixDPM_TABLE_246 0x336b0 622 #define ixDPM_TABLE_247 0x336b4 623 #define ixDPM_TABLE_248 0x336b8 624 #define ixDPM_TABLE_249 0x336bc 625 #define ixDPM_TABLE_250 0x336c0 626 #define ixDPM_TABLE_251 0x336c4 627 #define ixDPM_TABLE_252 0x336c8 628 #define ixDPM_TABLE_253 0x336cc 629 #define ixDPM_TABLE_254 0x336d0 630 #define ixDPM_TABLE_255 0x336d4 631 #define ixDPM_TABLE_256 0x336d8 632 #define ixDPM_TABLE_257 0x336dc 633 #define ixDPM_TABLE_258 0x336e0 634 #define ixDPM_TABLE_259 0x336e4 635 #define ixDPM_TABLE_260 0x336e8 636 #define ixDPM_TABLE_261 0x336ec 637 #define ixDPM_TABLE_262 0x336f0 638 #define ixDPM_TABLE_263 0x336f4 639 #define ixDPM_TABLE_264 0x336f8 640 #define ixDPM_TABLE_265 0x336fc 641 #define ixDPM_TABLE_266 0x33700 642 #define ixDPM_TABLE_267 0x33704 643 #define ixDPM_TABLE_268 0x33708 644 #define ixDPM_TABLE_269 0x3370c 645 #define ixDPM_TABLE_270 0x33710 646 #define ixDPM_TABLE_271 0x33714 647 #define ixDPM_TABLE_272 0x33718 648 #define ixDPM_TABLE_273 0x3371c 649 #define ixDPM_TABLE_274 0x33720 650 #define ixDPM_TABLE_275 0x33724 651 #define ixDPM_TABLE_276 0x33728 652 #define ixDPM_TABLE_277 0x3372c 653 #define ixDPM_TABLE_278 0x33730 654 #define ixDPM_TABLE_279 0x33734 655 #define ixDPM_TABLE_280 0x33738 656 #define ixDPM_TABLE_281 0x3373c 657 #define ixDPM_TABLE_282 0x33740 658 #define ixDPM_TABLE_283 0x33744 659 #define ixDPM_TABLE_284 0x33748 660 #define ixDPM_TABLE_285 0x3374c 661 #define ixDPM_TABLE_286 0x33750 662 #define ixDPM_TABLE_287 0x33754 663 #define ixDPM_TABLE_288 0x33758 664 #define ixDPM_TABLE_289 0x3375c 665 #define ixDPM_TABLE_290 0x33760 666 #define ixDPM_TABLE_291 0x33764 667 #define ixDPM_TABLE_292 0x33768 668 #define ixDPM_TABLE_293 0x3376c 669 #define ixDPM_TABLE_294 0x33770 670 #define ixDPM_TABLE_295 0x33774 671 #define ixDPM_TABLE_296 0x33778 672 #define ixDPM_TABLE_297 0x3377c 673 #define ixDPM_TABLE_298 0x33780 674 #define ixDPM_TABLE_299 0x33784 675 #define ixDPM_TABLE_300 0x33788 676 #define ixDPM_TABLE_301 0x3378c 677 #define ixDPM_TABLE_302 0x33790 678 #define ixDPM_TABLE_303 0x33794 679 #define ixDPM_TABLE_304 0x33798 680 #define ixDPM_TABLE_305 0x3379c 681 #define ixDPM_TABLE_306 0x337a0 682 #define ixDPM_TABLE_307 0x337a4 683 #define ixDPM_TABLE_308 0x337a8 684 #define ixDPM_TABLE_309 0x337ac 685 #define ixDPM_TABLE_310 0x337b0 686 #define ixDPM_TABLE_311 0x337b4 687 #define ixDPM_TABLE_312 0x337b8 688 #define ixDPM_TABLE_313 0x337bc 689 #define ixDPM_TABLE_314 0x337c0 690 #define ixDPM_TABLE_315 0x337c4 691 #define ixDPM_TABLE_316 0x337c8 692 #define ixDPM_TABLE_317 0x337cc 693 #define ixDPM_TABLE_318 0x337d0 694 #define ixDPM_TABLE_319 0x337d4 695 #define ixDPM_TABLE_320 0x337d8 696 #define ixDPM_TABLE_321 0x337dc 697 #define ixDPM_TABLE_322 0x337e0 698 #define ixDPM_TABLE_323 0x337e4 699 #define ixDPM_TABLE_324 0x337e8 700 #define ixDPM_TABLE_325 0x337ec 701 #define ixDPM_TABLE_326 0x337f0 702 #define ixDPM_TABLE_327 0x337f4 703 #define ixDPM_TABLE_328 0x337f8 704 #define ixDPM_TABLE_329 0x337fc 705 #define ixDPM_TABLE_330 0x33800 706 #define ixDPM_TABLE_331 0x33804 707 #define ixDPM_TABLE_332 0x33808 708 #define ixDPM_TABLE_333 0x3380c 709 #define ixDPM_TABLE_334 0x33810 710 #define ixDPM_TABLE_335 0x33814 711 #define ixDPM_TABLE_336 0x33818 712 #define ixDPM_TABLE_337 0x3381c 713 #define ixDPM_TABLE_338 0x33820 714 #define ixDPM_TABLE_339 0x33824 715 #define ixDPM_TABLE_340 0x33828 716 #define ixDPM_TABLE_341 0x3382c 717 #define ixDPM_TABLE_342 0x33830 718 #define ixDPM_TABLE_343 0x33834 719 #define ixDPM_TABLE_344 0x33838 720 #define ixDPM_TABLE_345 0x3383c 721 #define ixDPM_TABLE_346 0x33840 722 #define ixDPM_TABLE_347 0x33844 723 #define ixDPM_TABLE_348 0x33848 724 #define ixDPM_TABLE_349 0x3384c 725 #define ixDPM_TABLE_350 0x33850 726 #define ixDPM_TABLE_351 0x33854 727 #define ixDPM_TABLE_352 0x33858 728 #define ixDPM_TABLE_353 0x3385c 729 #define ixDPM_TABLE_354 0x33860 730 #define ixDPM_TABLE_355 0x33864 731 #define ixDPM_TABLE_356 0x33868 732 #define ixDPM_TABLE_357 0x3386c 733 #define ixDPM_TABLE_358 0x33870 734 #define ixDPM_TABLE_359 0x33874 735 #define ixDPM_TABLE_360 0x33878 736 #define ixDPM_TABLE_361 0x3387c 737 #define ixDPM_TABLE_362 0x33880 738 #define ixDPM_TABLE_363 0x33884 739 #define ixDPM_TABLE_364 0x33888 740 #define ixDPM_TABLE_365 0x3388c 741 #define ixDPM_TABLE_366 0x33890 742 #define ixDPM_TABLE_367 0x33894 743 #define ixDPM_TABLE_368 0x33898 744 #define ixDPM_TABLE_369 0x3389c 745 #define ixDPM_TABLE_370 0x338a0 746 #define ixSOFT_REGISTERS_TABLE_1 0x338c8 747 #define ixSOFT_REGISTERS_TABLE_2 0x338cc 748 #define ixSOFT_REGISTERS_TABLE_3 0x338d0 749 #define ixSOFT_REGISTERS_TABLE_4 0x338d4 750 #define ixSOFT_REGISTERS_TABLE_5 0x338d8 751 #define ixSOFT_REGISTERS_TABLE_6 0x338dc 752 #define ixSOFT_REGISTERS_TABLE_7 0x338e0 753 #define ixSOFT_REGISTERS_TABLE_8 0x338e4 754 #define ixSOFT_REGISTERS_TABLE_9 0x338e8 755 #define ixSOFT_REGISTERS_TABLE_10 0x338ec 756 #define ixSOFT_REGISTERS_TABLE_11 0x338f0 757 #define ixSOFT_REGISTERS_TABLE_12 0x338f4 758 #define ixSOFT_REGISTERS_TABLE_13 0x338f8 759 #define ixSOFT_REGISTERS_TABLE_14 0x338fc 760 #define ixSOFT_REGISTERS_TABLE_15 0x33900 761 #define ixSOFT_REGISTERS_TABLE_16 0x33904 762 #define ixSOFT_REGISTERS_TABLE_17 0x33908 763 #define ixSOFT_REGISTERS_TABLE_18 0x3390c 764 #define ixSOFT_REGISTERS_TABLE_19 0x33910 765 #define ixSOFT_REGISTERS_TABLE_20 0x33914 766 #define ixSOFT_REGISTERS_TABLE_21 0x33918 767 #define ixSOFT_REGISTERS_TABLE_22 0x3391c 768 #define ixSOFT_REGISTERS_TABLE_23 0x33920 769 #define ixSOFT_REGISTERS_TABLE_24 0x33924 770 #define ixSOFT_REGISTERS_TABLE_25 0x33928 771 #define ixSOFT_REGISTERS_TABLE_26 0x3392c 772 #define ixSOFT_REGISTERS_TABLE_27 0x33930 773 #define ixSOFT_REGISTERS_TABLE_28 0x33934 774 #define ixSOFT_REGISTERS_TABLE_29 0x33938 775 #define ixFIRMWARE_FLAGS 0x33000 776 #define ixTDC_STATUS 0x33004 777 #define ixTDC_MV_AVERAGE 0x33008 778 #define ixTDC_VRM_LIMIT 0x3300c 779 #define ixFEATURE_STATUS 0x33010 780 #define ixENTITY_TEMPERATURES_1 0x33014 781 #define ixPM_FUSES_1 0x3394c 782 #define ixPM_FUSES_2 0x33950 783 #define ixPM_FUSES_3 0x33954 784 #define ixPM_FUSES_4 0x33958 785 #define ixPM_FUSES_5 0x3395c 786 #define ixPM_FUSES_6 0x33960 787 #define ixPM_FUSES_7 0x33964 788 #define ixPM_FUSES_8 0x33968 789 #define ixPM_FUSES_9 0x3396c 790 #define ixPM_FUSES_10 0x33970 791 #define ixPM_FUSES_11 0x33974 792 #define ixPM_FUSES_12 0x33978 793 #define ixPM_FUSES_13 0x3397c 794 #define ixPM_FUSES_14 0x33980 795 #define ixPM_FUSES_15 0x33984 796 #define ixPM_FUSES_16 0x33988 797 #define ixPM_FUSES_17 0x3398c 798 #define ixPM_FUSES_18 0x33990 799 #define ixPM_FUSES_19 0x33994 800 #define ixPM_FUSES_20 0x33998 801 #define ixPM_FUSES_21 0x3399c 802 #define ixSMU_PM_STATUS_0 0x33e00 803 #define ixSMU_PM_STATUS_1 0x33e04 804 #define ixSMU_PM_STATUS_2 0x33e08 805 #define ixSMU_PM_STATUS_3 0x33e0c 806 #define ixSMU_PM_STATUS_4 0x33e10 807 #define ixSMU_PM_STATUS_5 0x33e14 808 #define ixSMU_PM_STATUS_6 0x33e18 809 #define ixSMU_PM_STATUS_7 0x33e1c 810 #define ixSMU_PM_STATUS_8 0x33e20 811 #define ixSMU_PM_STATUS_9 0x33e24 812 #define ixSMU_PM_STATUS_10 0x33e28 813 #define ixSMU_PM_STATUS_11 0x33e2c 814 #define ixSMU_PM_STATUS_12 0x33e30 815 #define ixSMU_PM_STATUS_13 0x33e34 816 #define ixSMU_PM_STATUS_14 0x33e38 817 #define ixSMU_PM_STATUS_15 0x33e3c 818 #define ixSMU_PM_STATUS_16 0x33e40 819 #define ixSMU_PM_STATUS_17 0x33e44 820 #define ixSMU_PM_STATUS_18 0x33e48 821 #define ixSMU_PM_STATUS_19 0x33e4c 822 #define ixSMU_PM_STATUS_20 0x33e50 823 #define ixSMU_PM_STATUS_21 0x33e54 824 #define ixSMU_PM_STATUS_22 0x33e58 825 #define ixSMU_PM_STATUS_23 0x33e5c 826 #define ixSMU_PM_STATUS_24 0x33e60 827 #define ixSMU_PM_STATUS_25 0x33e64 828 #define ixSMU_PM_STATUS_26 0x33e68 829 #define ixSMU_PM_STATUS_27 0x33e6c 830 #define ixSMU_PM_STATUS_28 0x33e70 831 #define ixSMU_PM_STATUS_29 0x33e74 832 #define ixSMU_PM_STATUS_30 0x33e78 833 #define ixSMU_PM_STATUS_31 0x33e7c 834 #define ixSMU_PM_STATUS_32 0x33e80 835 #define ixSMU_PM_STATUS_33 0x33e84 836 #define ixSMU_PM_STATUS_34 0x33e88 837 #define ixSMU_PM_STATUS_35 0x33e8c 838 #define ixSMU_PM_STATUS_36 0x33e90 839 #define ixSMU_PM_STATUS_37 0x33e94 840 #define ixSMU_PM_STATUS_38 0x33e98 841 #define ixSMU_PM_STATUS_39 0x33e9c 842 #define ixSMU_PM_STATUS_40 0x33ea0 843 #define ixSMU_PM_STATUS_41 0x33ea4 844 #define ixSMU_PM_STATUS_42 0x33ea8 845 #define ixSMU_PM_STATUS_43 0x33eac 846 #define ixSMU_PM_STATUS_44 0x33eb0 847 #define ixSMU_PM_STATUS_45 0x33eb4 848 #define ixSMU_PM_STATUS_46 0x33eb8 849 #define ixSMU_PM_STATUS_47 0x33ebc 850 #define ixSMU_PM_STATUS_48 0x33ec0 851 #define ixSMU_PM_STATUS_49 0x33ec4 852 #define ixSMU_PM_STATUS_50 0x33ec8 853 #define ixSMU_PM_STATUS_51 0x33ecc 854 #define ixSMU_PM_STATUS_52 0x33ed0 855 #define ixSMU_PM_STATUS_53 0x33ed4 856 #define ixSMU_PM_STATUS_54 0x33ed8 857 #define ixSMU_PM_STATUS_55 0x33edc 858 #define ixSMU_PM_STATUS_56 0x33ee0 859 #define ixSMU_PM_STATUS_57 0x33ee4 860 #define ixSMU_PM_STATUS_58 0x33ee8 861 #define ixSMU_PM_STATUS_59 0x33eec 862 #define ixSMU_PM_STATUS_60 0x33ef0 863 #define ixSMU_PM_STATUS_61 0x33ef4 864 #define ixSMU_PM_STATUS_62 0x33ef8 865 #define ixSMU_PM_STATUS_63 0x33efc 866 #define ixSMU_PM_STATUS_64 0x33f00 867 #define ixSMU_PM_STATUS_65 0x33f04 868 #define ixSMU_PM_STATUS_66 0x33f08 869 #define ixSMU_PM_STATUS_67 0x33f0c 870 #define ixSMU_PM_STATUS_68 0x33f10 871 #define ixSMU_PM_STATUS_69 0x33f14 872 #define ixSMU_PM_STATUS_70 0x33f18 873 #define ixSMU_PM_STATUS_71 0x33f1c 874 #define ixSMU_PM_STATUS_72 0x33f20 875 #define ixSMU_PM_STATUS_73 0x33f24 876 #define ixSMU_PM_STATUS_74 0x33f28 877 #define ixSMU_PM_STATUS_75 0x33f2c 878 #define ixSMU_PM_STATUS_76 0x33f30 879 #define ixSMU_PM_STATUS_77 0x33f34 880 #define ixSMU_PM_STATUS_78 0x33f38 881 #define ixSMU_PM_STATUS_79 0x33f3c 882 #define ixSMU_PM_STATUS_80 0x33f40 883 #define ixSMU_PM_STATUS_81 0x33f44 884 #define ixSMU_PM_STATUS_82 0x33f48 885 #define ixSMU_PM_STATUS_83 0x33f4c 886 #define ixSMU_PM_STATUS_84 0x33f50 887 #define ixSMU_PM_STATUS_85 0x33f54 888 #define ixSMU_PM_STATUS_86 0x33f58 889 #define ixSMU_PM_STATUS_87 0x33f5c 890 #define ixSMU_PM_STATUS_88 0x33f60 891 #define ixSMU_PM_STATUS_89 0x33f64 892 #define ixSMU_PM_STATUS_90 0x33f68 893 #define ixSMU_PM_STATUS_91 0x33f6c 894 #define ixSMU_PM_STATUS_92 0x33f70 895 #define ixSMU_PM_STATUS_93 0x33f74 896 #define ixSMU_PM_STATUS_94 0x33f78 897 #define ixSMU_PM_STATUS_95 0x33f7c 898 #define ixSMU_PM_STATUS_96 0x33f80 899 #define ixSMU_PM_STATUS_97 0x33f84 900 #define ixSMU_PM_STATUS_98 0x33f88 901 #define ixSMU_PM_STATUS_99 0x33f8c 902 #define ixSMU_PM_STATUS_100 0x33f90 903 #define ixSMU_PM_STATUS_101 0x33f94 904 #define ixSMU_PM_STATUS_102 0x33f98 905 #define ixSMU_PM_STATUS_103 0x33f9c 906 #define ixSMU_PM_STATUS_104 0x33fa0 907 #define ixSMU_PM_STATUS_105 0x33fa4 908 #define ixSMU_PM_STATUS_106 0x33fa8 909 #define ixSMU_PM_STATUS_107 0x33fac 910 #define ixSMU_PM_STATUS_108 0x33fb0 911 #define ixSMU_PM_STATUS_109 0x33fb4 912 #define ixSMU_PM_STATUS_110 0x33fb8 913 #define ixSMU_PM_STATUS_111 0x33fbc 914 #define ixSMU_PM_STATUS_112 0x33fc0 915 #define ixSMU_PM_STATUS_113 0x33fc4 916 #define ixSMU_PM_STATUS_114 0x33fc8 917 #define ixSMU_PM_STATUS_115 0x33fcc 918 #define ixSMU_PM_STATUS_116 0x33fd0 919 #define ixSMU_PM_STATUS_117 0x33fd4 920 #define ixSMU_PM_STATUS_118 0x33fd8 921 #define ixSMU_PM_STATUS_119 0x33fdc 922 #define ixSMU_PM_STATUS_120 0x33fe0 923 #define ixSMU_PM_STATUS_121 0x33fe4 924 #define ixSMU_PM_STATUS_122 0x33fe8 925 #define ixSMU_PM_STATUS_123 0x33fec 926 #define ixSMU_PM_STATUS_124 0x33ff0 927 #define ixSMU_PM_STATUS_125 0x33ff4 928 #define ixSMU_PM_STATUS_126 0x33ff8 929 #define ixSMU_PM_STATUS_127 0x33ffc 930 #define ixCG_THERMAL_INT_ENA 0xc2100024 931 #define ixCG_THERMAL_INT_CTRL 0xc2100028 932 #define ixCG_THERMAL_INT_STATUS 0xc210002c 933 #define ixCG_THERMAL_CTRL 0xc0300004 934 #define ixCG_THERMAL_STATUS 0xc0300008 935 #define ixCG_THERMAL_INT 0xc030000c 936 #define ixCG_MULT_THERMAL_CTRL 0xc0300010 937 #define ixCG_MULT_THERMAL_STATUS 0xc0300014 938 #define ixCG_FDO_CTRL0 0xc0300064 939 #define ixCG_FDO_CTRL1 0xc0300068 940 #define ixCG_FDO_CTRL2 0xc030006c 941 #define ixCG_TACH_CTRL 0xc0300070 942 #define ixCG_TACH_STATUS 0xc0300074 943 #define ixCC_THM_STRAPS0 0xc0300080 944 #define ixTHM_TMON0_RDIL0_DATA 0xc0300100 945 #define ixTHM_TMON0_RDIL1_DATA 0xc0300104 946 #define ixTHM_TMON0_RDIL2_DATA 0xc0300108 947 #define ixTHM_TMON0_RDIL3_DATA 0xc030010c 948 #define ixTHM_TMON0_RDIL4_DATA 0xc0300110 949 #define ixTHM_TMON0_RDIL5_DATA 0xc0300114 950 #define ixTHM_TMON0_RDIL6_DATA 0xc0300118 951 #define ixTHM_TMON0_RDIL7_DATA 0xc030011c 952 #define ixTHM_TMON0_RDIL8_DATA 0xc0300120 953 #define ixTHM_TMON0_RDIL9_DATA 0xc0300124 954 #define ixTHM_TMON0_RDIL10_DATA 0xc0300128 955 #define ixTHM_TMON0_RDIL11_DATA 0xc030012c 956 #define ixTHM_TMON0_RDIL12_DATA 0xc0300130 957 #define ixTHM_TMON0_RDIL13_DATA 0xc0300134 958 #define ixTHM_TMON0_RDIL14_DATA 0xc0300138 959 #define ixTHM_TMON0_RDIL15_DATA 0xc030013c 960 #define ixTHM_TMON0_RDIR0_DATA 0xc0300140 961 #define ixTHM_TMON0_RDIR1_DATA 0xc0300144 962 #define ixTHM_TMON0_RDIR2_DATA 0xc0300148 963 #define ixTHM_TMON0_RDIR3_DATA 0xc030014c 964 #define ixTHM_TMON0_RDIR4_DATA 0xc0300150 965 #define ixTHM_TMON0_RDIR5_DATA 0xc0300154 966 #define ixTHM_TMON0_RDIR6_DATA 0xc0300158 967 #define ixTHM_TMON0_RDIR7_DATA 0xc030015c 968 #define ixTHM_TMON0_RDIR8_DATA 0xc0300160 969 #define ixTHM_TMON0_RDIR9_DATA 0xc0300164 970 #define ixTHM_TMON0_RDIR10_DATA 0xc0300168 971 #define ixTHM_TMON0_RDIR11_DATA 0xc030016c 972 #define ixTHM_TMON0_RDIR12_DATA 0xc0300170 973 #define ixTHM_TMON0_RDIR13_DATA 0xc0300174 974 #define ixTHM_TMON0_RDIR14_DATA 0xc0300178 975 #define ixTHM_TMON0_RDIR15_DATA 0xc030017c 976 #define ixTHM_TMON0_INT_DATA 0xc0300300 977 #define ixTHM_TMON0_DEBUG 0xc0300310 978 #define ixTHM_TMON0_STATUS 0xc0300320 979 #define ixGENERAL_PWRMGT 0xc0200000 980 #define ixCNB_PWRMGT_CNTL 0xc0200004 981 #define ixSCLK_PWRMGT_CNTL 0xc0200008 982 #define ixTARGET_AND_CURRENT_PROFILE_INDEX 0xc0200014 983 #define ixPWR_PCC_CONTROL 0xc0200018 984 #define ixPWR_PCC_GPIO_SELECT 0xc020001c 985 #define ixCG_FREQ_TRAN_VOTING_0 0xc02001a8 986 #define ixCG_FREQ_TRAN_VOTING_1 0xc02001ac 987 #define ixCG_FREQ_TRAN_VOTING_2 0xc02001b0 988 #define ixCG_FREQ_TRAN_VOTING_3 0xc02001b4 989 #define ixCG_FREQ_TRAN_VOTING_4 0xc02001b8 990 #define ixCG_FREQ_TRAN_VOTING_5 0xc02001bc 991 #define ixCG_FREQ_TRAN_VOTING_6 0xc02001c0 992 #define ixCG_FREQ_TRAN_VOTING_7 0xc02001c4 993 #define ixPLL_TEST_CNTL 0xc020003c 994 #define ixCG_STATIC_SCREEN_PARAMETER 0xc0200044 995 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060 996 #define ixCG_DISPLAY_GAP_CNTL2 0xc0200230 997 #define ixCG_ACPI_CNTL 0xc0200064 998 #define ixSCLK_DEEP_SLEEP_CNTL 0xc0200080 999 #define ixSCLK_DEEP_SLEEP_CNTL2 0xc0200084 1000 #define ixSCLK_DEEP_SLEEP_CNTL3 0xc020009c 1001 #define ixSCLK_DEEP_SLEEP_MISC_CNTL 0xc0200088 1002 #define ixLCLK_DEEP_SLEEP_CNTL 0xc020008c 1003 #define ixLCLK_DEEP_SLEEP_CNTL2 0xc0200310 1004 #define ixTARGET_AND_CURRENT_PROFILE_INDEX_1 0xc02000f0 1005 #define ixCG_ULV_PARAMETER 0xc020015c 1006 #define ixSCLK_MIN_DIV 0xc02003ac 1007 #define ixPWR_DISP_TIMER_0_CONTROL 0xc0200390 1008 #define ixPWR_DISP_TIMER_1_CONTROL 0xc020037c 1009 #define ixPWR_DISP_TIMER_2_CONTROL 0xc02003d0 1010 #define ixPWR_DISP_TIMER_3_CONTROL 0xc02003d4 1011 #define ixPWR_DISP_TIMER_4_CONTROL 0xc02003d8 1012 #define ixPWR_DISP_TIMER_5_CONTROL 0xc02003dc 1013 #define ixPWR_DISP_TIMER_6_CONTROL 0xc02003e0 1014 #define ixPWR_DISP_TIMER_7_CONTROL 0xc02003e4 1015 #define ixPWR_DISP_TIMER_8_CONTROL 0xc02003e8 1016 #define ixPWR_DISP_TIMER_9_CONTROL 0xc02003ec 1017 #define ixPWR_DISP_TIMER_10_CONTROL 0xc02003f0 1018 #define ixPWR_DISP_TIMER_11_CONTROL 0xc02003f4 1019 #define ixPWR_DISP_TIMER_12_CONTROL 0xc02003f8 1020 #define ixPWR_DISP_TIMER_13_CONTROL 0xc02003fc 1021 #define ixPWR_DISP_TIMER_14_CONTROL 0xc0200074 1022 #define ixPWR_DISP_TIMER_15_CONTROL 0xc0200078 1023 #define ixPWR_DISP_TIMER_CONTROL2 0xc0200378 1024 #define ixVDDGFX_IDLE_PARAMETER 0xc020036c 1025 #define ixVDDGFX_IDLE_CONTROL 0xc0200370 1026 #define ixVDDGFX_IDLE_EXIT 0xc0200374 1027 #define ixLCAC_MC0_CNTL 0xc0400130 1028 #define ixLCAC_MC0_OVR_SEL 0xc0400134 1029 #define ixLCAC_MC0_OVR_VAL 0xc0400138 1030 #define ixLCAC_MC1_CNTL 0xc040013c 1031 #define ixLCAC_MC1_OVR_SEL 0xc0400140 1032 #define ixLCAC_MC1_OVR_VAL 0xc0400144 1033 #define ixLCAC_MC2_CNTL 0xc0400148 1034 #define ixLCAC_MC2_OVR_SEL 0xc040014c 1035 #define ixLCAC_MC2_OVR_VAL 0xc0400150 1036 #define ixLCAC_MC3_CNTL 0xc0400154 1037 #define ixLCAC_MC3_OVR_SEL 0xc0400158 1038 #define ixLCAC_MC3_OVR_VAL 0xc040015c 1039 #define ixLCAC_CPL_CNTL 0xc0400160 1040 #define ixLCAC_CPL_OVR_SEL 0xc0400164 1041 #define ixLCAC_CPL_OVR_VAL 0xc0400168 1042 #define mmROM_SMC_IND_INDEX 0x80 1043 #define mmROM0_ROM_SMC_IND_INDEX 0x80 1044 #define mmROM1_ROM_SMC_IND_INDEX 0x82 1045 #define mmROM2_ROM_SMC_IND_INDEX 0x84 1046 #define mmROM3_ROM_SMC_IND_INDEX 0x86 1047 #define mmROM_SMC_IND_DATA 0x81 1048 #define mmROM0_ROM_SMC_IND_DATA 0x81 1049 #define mmROM1_ROM_SMC_IND_DATA 0x83 1050 #define mmROM2_ROM_SMC_IND_DATA 0x85 1051 #define mmROM3_ROM_SMC_IND_DATA 0x87 1052 #define ixROM_CNTL 0xc0600000 1053 #define ixPAGE_MIRROR_CNTL 0xc0600004 1054 #define ixROM_STATUS 0xc0600008 1055 #define ixCGTT_ROM_CLK_CTRL0 0xc060000c 1056 #define ixROM_INDEX 0xc0600010 1057 #define ixROM_DATA 0xc0600014 1058 #define ixROM_START 0xc0600018 1059 #define ixROM_SW_CNTL 0xc060001c 1060 #define ixROM_SW_STATUS 0xc0600020 1061 #define ixROM_SW_COMMAND 0xc0600024 1062 #define ixROM_SW_DATA_1 0xc0600028 1063 #define ixROM_SW_DATA_2 0xc060002c 1064 #define ixROM_SW_DATA_3 0xc0600030 1065 #define ixROM_SW_DATA_4 0xc0600034 1066 #define ixROM_SW_DATA_5 0xc0600038 1067 #define ixROM_SW_DATA_6 0xc060003c 1068 #define ixROM_SW_DATA_7 0xc0600040 1069 #define ixROM_SW_DATA_8 0xc0600044 1070 #define ixROM_SW_DATA_9 0xc0600048 1071 #define ixROM_SW_DATA_10 0xc060004c 1072 #define ixROM_SW_DATA_11 0xc0600050 1073 #define ixROM_SW_DATA_12 0xc0600054 1074 #define ixROM_SW_DATA_13 0xc0600058 1075 #define ixROM_SW_DATA_14 0xc060005c 1076 #define ixROM_SW_DATA_15 0xc0600060 1077 #define ixROM_SW_DATA_16 0xc0600064 1078 #define ixROM_SW_DATA_17 0xc0600068 1079 #define ixROM_SW_DATA_18 0xc060006c 1080 #define ixROM_SW_DATA_19 0xc0600070 1081 #define ixROM_SW_DATA_20 0xc0600074 1082 #define ixROM_SW_DATA_21 0xc0600078 1083 #define ixROM_SW_DATA_22 0xc060007c 1084 #define ixROM_SW_DATA_23 0xc0600080 1085 #define ixROM_SW_DATA_24 0xc0600084 1086 #define ixROM_SW_DATA_25 0xc0600088 1087 #define ixROM_SW_DATA_26 0xc060008c 1088 #define ixROM_SW_DATA_27 0xc0600090 1089 #define ixROM_SW_DATA_28 0xc0600094 1090 #define ixROM_SW_DATA_29 0xc0600098 1091 #define ixROM_SW_DATA_30 0xc060009c 1092 #define ixROM_SW_DATA_31 0xc06000a0 1093 #define ixROM_SW_DATA_32 0xc06000a4 1094 #define ixROM_SW_DATA_33 0xc06000a8 1095 #define ixROM_SW_DATA_34 0xc06000ac 1096 #define ixROM_SW_DATA_35 0xc06000b0 1097 #define ixROM_SW_DATA_36 0xc06000b4 1098 #define ixROM_SW_DATA_37 0xc06000b8 1099 #define ixROM_SW_DATA_38 0xc06000bc 1100 #define ixROM_SW_DATA_39 0xc06000c0 1101 #define ixROM_SW_DATA_40 0xc06000c4 1102 #define ixROM_SW_DATA_41 0xc06000c8 1103 #define ixROM_SW_DATA_42 0xc06000cc 1104 #define ixROM_SW_DATA_43 0xc06000d0 1105 #define ixROM_SW_DATA_44 0xc06000d4 1106 #define ixROM_SW_DATA_45 0xc06000d8 1107 #define ixROM_SW_DATA_46 0xc06000dc 1108 #define ixROM_SW_DATA_47 0xc06000e0 1109 #define ixROM_SW_DATA_48 0xc06000e4 1110 #define ixROM_SW_DATA_49 0xc06000e8 1111 #define ixROM_SW_DATA_50 0xc06000ec 1112 #define ixROM_SW_DATA_51 0xc06000f0 1113 #define ixROM_SW_DATA_52 0xc06000f4 1114 #define ixROM_SW_DATA_53 0xc06000f8 1115 #define ixROM_SW_DATA_54 0xc06000fc 1116 #define ixROM_SW_DATA_55 0xc0600100 1117 #define ixROM_SW_DATA_56 0xc0600104 1118 #define ixROM_SW_DATA_57 0xc0600108 1119 #define ixROM_SW_DATA_58 0xc060010c 1120 #define ixROM_SW_DATA_59 0xc0600110 1121 #define ixROM_SW_DATA_60 0xc0600114 1122 #define ixROM_SW_DATA_61 0xc0600118 1123 #define ixROM_SW_DATA_62 0xc060011c 1124 #define ixROM_SW_DATA_63 0xc0600120 1125 #define ixROM_SW_DATA_64 0xc0600124 1126 #define ixCURRENT_PG_STATUS 0xc020029c 1127 1128 #endif /* SMU_7_1_1_D_H */ 1129