1# mach: aarch64 2 3# Check the load multiple structure instructions: ld1, ld2, ld3, ld4. 4# Check the addressing modes: no offset, post-index immediate offset, 5# post-index register offset. 6 7.include "testutils.inc" 8 9 .data 10 .align 4 11input: 12 .word 0x04030201 13 .word 0x08070605 14 .word 0x0c0b0a09 15 .word 0x100f0e0d 16 .word 0xfcfdfeff 17 .word 0xf8f9fafb 18 .word 0xf4f5f6f7 19 .word 0xf0f1f2f3 20 21 start 22 adrp x0, input 23 add x0, x0, :lo12:input 24 25 mov x2, x0 26 mov x3, #16 27 ld1 {v0.16b}, [x2], 16 28 ld1 {v1.8h}, [x2], x3 29 addv b4, v0.16b 30 addv b5, v1.16b 31 mov x4, v4.d[0] 32 cmp x4, #136 33 bne .Lfailure 34 mov x5, v5.d[0] 35 cmp x5, #120 36 bne .Lfailure 37 38 mov x2, x0 39 mov x3, #16 40 ld2 {v0.8b, v1.8b}, [x2], x3 41 ld2 {v2.4h, v3.4h}, [x2], 16 42 addv b4, v0.8b 43 addv b5, v1.8b 44 addv b6, v2.8b 45 addv b7, v3.8b 46 mov x4, v4.d[0] 47 cmp x4, #64 48 bne .Lfailure 49 mov x5, v5.d[0] 50 cmp x5, #72 51 bne .Lfailure 52 mov x6, v6.d[0] 53 cmp x6, #196 54 bne .Lfailure 55 mov x7, v7.d[0] 56 cmp x7, #180 57 bne .Lfailure 58 59 mov x2, x0 60 ld3 {v0.2s, v1.2s, v2.2s}, [x2] 61 addv b4, v0.8b 62 addv b5, v1.8b 63 addv b6, v2.8b 64 mov x4, v4.d[0] 65 cmp x4, #68 66 bne .Lfailure 67 mov x5, v5.d[0] 68 cmp x5, #16 69 bne .Lfailure 70 mov x6, v6.d[0] 71 cmp x6, #16 72 bne .Lfailure 73 74 mov x2, x0 75 ld4 {v0.4h, v1.4h, v2.4h, v3.4h}, [x2] 76 addv b4, v0.8b 77 addv b5, v1.8b 78 addv b6, v2.8b 79 addv b7, v3.8b 80 mov x4, v4.d[0] 81 cmp x4, #0 82 bne .Lfailure 83 mov x5, v5.d[0] 84 cmp x5, #0 85 bne .Lfailure 86 mov x6, v6.d[0] 87 cmp x6, #0 88 bne .Lfailure 89 mov x7, v7.d[0] 90 cmp x7, #0 91 bne .Lfailure 92 93 mov x2, x0 94 ld1 {v0.4s, v1.4s}, [x2] 95 addv b4, v0.16b 96 addv b5, v1.16b 97 mov x4, v4.d[0] 98 cmp x4, #136 99 bne .Lfailure 100 mov x5, v5.d[0] 101 cmp x5, #120 102 bne .Lfailure 103 104 mov x2, x0 105 ld1 {v0.1d, v1.1d, v2.1d}, [x2] 106 addv b4, v0.8b 107 addv b5, v1.8b 108 addv b6, v2.8b 109 mov x4, v4.d[0] 110 cmp x4, #36 111 bne .Lfailure 112 mov x5, v5.d[0] 113 cmp x5, #100 114 bne .Lfailure 115 mov x6, v6.d[0] 116 cmp x6, #220 117 bne .Lfailure 118 119 mov x2, x0 120 ld1 {v0.1d, v1.1d, v2.1d, v3.1d}, [x2] 121 addv b4, v0.8b 122 addv b5, v1.8b 123 addv b6, v2.8b 124 mov x4, v4.d[0] 125 cmp x4, #36 126 bne .Lfailure 127 mov x5, v5.d[0] 128 cmp x5, #100 129 bne .Lfailure 130 mov x6, v6.d[0] 131 cmp x6, #220 132 bne .Lfailure 133 134 pass 135.Lfailure: 136 fail 137