1 /* $NetBSD: siisata_cardbus.c,v 1.16 2022/09/25 17:33:19 thorpej Exp $ */
2 /* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp */
3
4 /*
5 * Copyright (c) 2006 Manuel Bouyer.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28
29 /*
30 * Copyright (c) 2007, 2008 Jonathan A. Kollasch.
31 * All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions
35 * are met:
36 * 1. Redistributions of source code must retain the above copyright
37 * notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce the above copyright
39 * notice, this list of conditions and the following disclaimer in the
40 * documentation and/or other materials provided with the distribution.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
43 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
44 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
45 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
46 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
47 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
48 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
49 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
50 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
51 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52 */
53
54 #include <sys/cdefs.h>
55 __KERNEL_RCSID(0, "$NetBSD: siisata_cardbus.c,v 1.16 2022/09/25 17:33:19 thorpej Exp $");
56
57 #include <sys/types.h>
58 #include <sys/param.h>
59 #include <sys/kernel.h>
60 #include <sys/systm.h>
61
62 #include <dev/cardbus/cardbusvar.h>
63 #include <dev/pci/pcidevs.h>
64 #include <dev/ic/siisatavar.h>
65
66 struct siisata_cardbus_softc {
67 struct siisata_softc si_sc;
68 cardbus_chipset_tag_t sc_cc;
69 cardbus_function_tag_t sc_cf;
70 cardbus_devfunc_t sc_ct;
71 pcitag_t sc_tag;
72 bus_space_tag_t sc_iot; /* CardBus I/O space tag */
73 bus_space_tag_t sc_memt; /* CardBus MEM space tag */
74 rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */
75 rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */
76
77 bus_size_t sc_grsize;
78 bus_size_t sc_prsize;
79 void *sc_ih;
80 };
81
82 static int siisata_cardbus_match(device_t, cfdata_t, void *);
83 static void siisata_cardbus_attach(device_t, device_t, void *);
84 static int siisata_cardbus_detach(device_t, int);
85 static bool siisata_cardbus_resume(device_t, const pmf_qual_t *);
86
87 static const struct siisata_cardbus_product {
88 pci_vendor_id_t scp_vendor;
89 pci_product_id_t scp_product;
90 int scp_ports;
91 int scp_chip;
92
93 } siisata_cardbus_products[] = {
94 {
95 PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124,
96 4, 3124
97 },
98 {
99 0, 0,
100 0, 0
101 },
102 };
103
104 CFATTACH_DECL_NEW(siisata_cardbus, sizeof(struct siisata_cardbus_softc),
105 siisata_cardbus_match, siisata_cardbus_attach, siisata_cardbus_detach,
106 NULL);
107
108 static const struct siisata_cardbus_product *
siisata_cardbus_lookup(const struct cardbus_attach_args * ca)109 siisata_cardbus_lookup(const struct cardbus_attach_args *ca)
110 {
111 const struct siisata_cardbus_product *scp;
112
113 for (scp = siisata_cardbus_products; scp->scp_ports > 0; scp++) {
114 if (PCI_VENDOR(ca->ca_id) == scp->scp_vendor &&
115 PCI_PRODUCT(ca->ca_id) == scp->scp_product)
116 return scp;
117 }
118 return NULL;
119 }
120
121 static int
siisata_cardbus_match(device_t parent,cfdata_t match,void * aux)122 siisata_cardbus_match(device_t parent, cfdata_t match, void *aux)
123 {
124 struct cardbus_attach_args *ca = aux;
125
126 if (siisata_cardbus_lookup(ca) != NULL)
127 return 3;
128
129 return 0;
130 }
131
132 static void
siisata_cardbus_attach(device_t parent,device_t self,void * aux)133 siisata_cardbus_attach(device_t parent, device_t self, void *aux)
134 {
135 struct cardbus_attach_args *ca = aux;
136 struct siisata_cardbus_softc *csc = device_private(self);
137 struct siisata_softc *sc = &csc->si_sc;
138 cardbus_devfunc_t ct = ca->ca_ct;
139 cardbus_chipset_tag_t cc = ct->ct_cc;
140 cardbus_function_tag_t cf = ct->ct_cf;
141 pcireg_t csr;
142 const struct siisata_cardbus_product *scp;
143 bus_space_tag_t memt;
144 bus_space_handle_t memh;
145 bus_addr_t base;
146 bus_size_t grsize, prsize;
147 uint32_t gcreg;
148 char devinfo[256];
149
150 sc->sc_atac.atac_dev = self;
151
152 csc->sc_cc = cc;
153 csc->sc_cf = cf;
154 csc->sc_ct = ct;
155 csc->sc_tag = ca->ca_tag;
156
157 csc->sc_iot = ca->ca_iot;
158 csc->sc_memt = ca->ca_memt;
159 csc->sc_rbus_iot = ca->ca_rbus_iot;
160 csc->sc_rbus_memt = ca->ca_rbus_memt;
161
162 pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
163 aprint_naive(": SATA-II HBA\n");
164 aprint_normal(": %s\n", devinfo);
165
166 /*
167 * XXXX
168 * Our BAR0/BAR1 type is 64bit Memory. Cardbus_mapreg_map() don't
169 * support 64bit Memory. We map ourself...
170 */
171 /* map bar0 */
172 {
173 #define SIISATA_BAR0_SIZE 128
174 grsize = SIISATA_BAR0_SIZE;
175 base = PCI_MAPREG_MEM_ADDR(Cardbus_conf_read(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0));
176 memt = csc->sc_memt;
177 if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base,
178 grsize, grsize - 1, grsize, 0, &base, &memh)) {
179 aprint_error(
180 "%s: unable to map device global registers\n",
181 SIISATANAME(sc));
182 return;
183 }
184 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, base);
185 }
186 sc->sc_grt = memt;
187 sc->sc_grh = memh;
188 csc->sc_grsize = grsize;
189
190 /* map bar1 */
191 {
192 #define SIISATA_BAR1_SIZE (32 * 1024)
193 prsize = SIISATA_BAR1_SIZE;
194 base = PCI_MAPREG_MEM_ADDR(Cardbus_conf_read(ct, ca->ca_tag,
195 SIISATA_CARDBUS_BAR1));
196 memt = csc->sc_memt;
197 if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base,
198 prsize, prsize - 1, prsize, 0, &base, &memh)) {
199 Cardbus_conf_write(ct, ca->ca_tag,
200 SIISATA_CARDBUS_BAR0, 0);
201 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt,
202 sc->sc_grh, grsize);
203 aprint_error(
204 "%s: unable to map device port registers\n",
205 SIISATANAME(sc));
206 return;
207 }
208 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, base);
209 }
210 sc->sc_prt = memt;
211 sc->sc_prh = memh;
212 csc->sc_prsize = prsize;
213
214 sc->sc_dmat = ca->ca_dmat;
215
216 /* map interrupt */
217 csc->sc_ih = Cardbus_intr_establish(ct, IPL_BIO, siisata_intr, sc);
218 if (csc->sc_ih == NULL) {
219 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, 0);
220 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh,
221 grsize);
222 Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, 0);
223 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh,
224 prsize);
225 aprint_error("%s: couldn't establish interrupt\n",
226 SIISATANAME(sc));
227 return;
228 }
229
230 /* fill in number of ports on this device */
231 scp = siisata_cardbus_lookup(ca);
232 if (scp != NULL)
233 sc->sc_atac.atac_nchannels = scp->scp_ports;
234 else
235 /* _match() should prevent us from getting here */
236 panic("siisata: the universe might be falling apart!\n");
237
238 /* enable bus mastering in case the firmware didn't */
239 csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG);
240 csr |= PCI_COMMAND_MASTER_ENABLE;
241 csr |= PCI_COMMAND_MEM_ENABLE;
242 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, csr);
243
244 gcreg = GRREAD(sc, GR_GC);
245
246 /* CardBus supports only 32-bit 33MHz */
247 KASSERT(!(gcreg &
248 (GR_GC_REQ64|GR_GC_DEVSEL|GR_GC_STOP|GR_GC_TRDY|GR_GC_M66EN)));
249
250 aprint_normal("%s: SiI%d on 32-bit, 33MHz PCI (CardBus).",
251 SIISATANAME(sc), scp->scp_chip);
252 if (gcreg & GR_GC_3GBPS)
253 aprint_normal(" 3.0Gb/s capable.\n");
254 else
255 aprint_normal("\n");
256
257 siisata_attach(sc);
258
259 if (!pmf_device_register(self, NULL, siisata_cardbus_resume))
260 aprint_error_dev(self, "couldn't establish power handler\n");
261 }
262
263 static int
siisata_cardbus_detach(device_t self,int flags)264 siisata_cardbus_detach(device_t self, int flags)
265 {
266 struct siisata_cardbus_softc *csc = device_private(self);
267 struct siisata_softc *sc = &csc->si_sc;
268 struct cardbus_devfunc *ct = csc->sc_ct;
269 cardbus_chipset_tag_t cc = ct->ct_cc;
270 cardbus_function_tag_t cf = ct->ct_cf;
271 pcitag_t ctag = csc->sc_tag;
272 int rv;
273
274 rv = siisata_detach(sc, flags);
275 if (rv)
276 return (rv);
277 if (csc->sc_ih != NULL) {
278 Cardbus_intr_disestablish(ct, csc->sc_ih);
279 csc->sc_ih = NULL;
280 }
281 if (csc->sc_grsize) {
282 Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR0, 0);
283 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh,
284 csc->sc_grsize);
285 csc->sc_grsize = 0;
286 }
287 if (csc->sc_prsize) {
288 Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR1, 0);
289 (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh,
290 csc->sc_prsize);
291 csc->sc_prsize = 0;
292 }
293 return 0;
294 }
295
296 static bool
siisata_cardbus_resume(device_t dv,const pmf_qual_t * qual)297 siisata_cardbus_resume(device_t dv, const pmf_qual_t *qual)
298 {
299 struct siisata_cardbus_softc *csc = device_private(dv);
300 struct siisata_softc *sc = &csc->si_sc;
301 int s;
302
303 s = splbio();
304 siisata_resume(sc);
305 splx(s);
306
307 return true;
308 }
309