1 /* SPDX-License-Identifier: BSD-3-Clause
2 *
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2018-2019 Solarflare Communications Inc.
5 *
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
8 */
9
10 #ifndef _SFC_EF100_H
11 #define _SFC_EF100_H
12
13 #ifdef __cplusplus
14 extern "C" {
15 #endif
16
17 /**
18 * Prime event queue to allow processed events to be reused.
19 *
20 * @param evq_prime Global address of the prime register
21 * @param evq_hw_index Event queue index
22 * @param evq_read_ptr Masked event queue read pointer
23 */
24 static inline void
sfc_ef100_evq_prime(volatile void * evq_prime,unsigned int evq_hw_index,unsigned int evq_read_ptr)25 sfc_ef100_evq_prime(volatile void *evq_prime, unsigned int evq_hw_index,
26 unsigned int evq_read_ptr)
27 {
28 efx_dword_t dword;
29
30 EFX_POPULATE_DWORD_2(dword,
31 ERF_GZ_EVQ_ID, evq_hw_index,
32 ERF_GZ_IDX, evq_read_ptr);
33
34 /*
35 * EvQ prime on EF100 allows HW to reuse descriptors. So we
36 * should be sure that event descriptor reads are done.
37 * However, there is implicit data dependency here since we
38 * move past event if we have found out that the event has
39 * come (i.e. we read it) and we have processed it.
40 * So, no extra barriers are required here.
41 */
42 rte_write32_relaxed(dword.ed_u32[0], evq_prime);
43 }
44
45 static inline bool
sfc_ef100_ev_present(const efx_qword_t * ev,bool phase_bit)46 sfc_ef100_ev_present(const efx_qword_t *ev, bool phase_bit)
47 {
48 return !((ev->eq_u64[0] &
49 EFX_INPLACE_MASK64(0, 63, ESF_GZ_EV_EVQ_PHASE)) ^
50 ((uint64_t)phase_bit << ESF_GZ_EV_EVQ_PHASE_LBN));
51 }
52
53 static inline bool
sfc_ef100_ev_type_is(const efx_qword_t * ev,unsigned int type)54 sfc_ef100_ev_type_is(const efx_qword_t *ev, unsigned int type)
55 {
56 return (ev->eq_u64[0] & EFX_INPLACE_MASK64(0, 63, ESF_GZ_E_TYPE)) ==
57 EFX_INSERT_FIELD64(0, 63, ESF_GZ_E_TYPE, type);
58 }
59
60 #ifdef __cplusplus
61 }
62 #endif
63 #endif /* _SFC_EF100_H */
64