xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/selftest_llc.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: selftest_llc.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $	*/
2 
3 /*
4  * SPDX-License-Identifier: MIT
5  *
6  * Copyright © 2019 Intel Corporation
7  */
8 
9 #include <sys/cdefs.h>
10 __KERNEL_RCSID(0, "$NetBSD: selftest_llc.c,v 1.2 2021/12/18 23:45:30 riastradh Exp $");
11 
12 #include "intel_pm.h" /* intel_gpu_freq() */
13 #include "selftest_llc.h"
14 #include "intel_rps.h"
15 
gen6_verify_ring_freq(struct intel_llc * llc)16 static int gen6_verify_ring_freq(struct intel_llc *llc)
17 {
18 	struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
19 	struct ia_constants consts;
20 	intel_wakeref_t wakeref;
21 	unsigned int gpu_freq;
22 	int err = 0;
23 
24 	wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm);
25 
26 	if (!get_ia_constants(llc, &consts)) {
27 		err = -ENODEV;
28 		goto out_rpm;
29 	}
30 
31 	for (gpu_freq = consts.min_gpu_freq;
32 	     gpu_freq <= consts.max_gpu_freq;
33 	     gpu_freq++) {
34 		struct intel_rps *rps = &llc_to_gt(llc)->rps;
35 
36 		unsigned int ia_freq, ring_freq, found;
37 		u32 val;
38 
39 		calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq);
40 
41 		val = gpu_freq;
42 		if (sandybridge_pcode_read(i915,
43 					   GEN6_PCODE_READ_MIN_FREQ_TABLE,
44 					   &val, NULL)) {
45 			pr_err("Failed to read freq table[%d], range [%d, %d]\n",
46 			       gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq);
47 			err = -ENXIO;
48 			break;
49 		}
50 
51 		found = (val >> 0) & 0xff;
52 		if (found != ia_freq) {
53 			pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
54 			       gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
55 			       intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
56 			       found, ia_freq);
57 			err = -EINVAL;
58 			break;
59 		}
60 
61 		found = (val >> 8) & 0xff;
62 		if (found != ring_freq) {
63 			pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
64 			       gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
65 			       intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
66 			       found, ring_freq);
67 			err = -EINVAL;
68 			break;
69 		}
70 	}
71 
72 out_rpm:
73 	intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref);
74 	return err;
75 }
76 
st_llc_verify(struct intel_llc * llc)77 int st_llc_verify(struct intel_llc *llc)
78 {
79 	int err = 0;
80 
81 	if (HAS_LLC(llc_to_gt(llc)->i915))
82 		err = gen6_verify_ring_freq(llc);
83 
84 	return err;
85 }
86