1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(C) 2023 Marvell. 3 */ 4 5 #ifndef RTE_PDCP_HDR_H 6 #define RTE_PDCP_HDR_H 7 8 /** 9 * @file 10 * 11 * PDCP-related defines 12 * 13 * Based on - ETSI TS 138 323 V17.1.0 (2022-08) 14 * https://www.etsi.org/deliver/etsi_ts/138300_138399/138323/17.01.00_60/ts_138323v170100p.pdf 15 */ 16 17 #include <rte_byteorder.h> 18 19 /** 20 * 4.3.1 21 * 22 * Indicate the maximum supported size of a PDCP Control PDU. 23 */ 24 #define RTE_PDCP_CTRL_PDU_SIZE_MAX 9000u 25 26 /** 27 * 6.3.4 MAC-I 28 * 29 * Indicate the size of MAC-I in PDCP PDU. 30 */ 31 #define RTE_PDCP_MAC_I_LEN 4 32 33 /** 34 * Indicate type of control information included in the corresponding PDCP 35 * Control PDU. 36 */ 37 enum rte_pdcp_ctrl_pdu_type { 38 RTE_PDCP_CTRL_PDU_TYPE_STATUS_REPORT = 0, 39 RTE_PDCP_CTRL_PDU_TYPE_ROHC_FEEDBACK = 1, 40 RTE_PDCP_CTRL_PDU_TYPE_EHC_FEEDBACK = 2, 41 RTE_PDCP_CRTL_PDU_TYPE_UDC_FEEDBACK = 3, 42 }; 43 44 /** 45 * 6.3.7 D/C 46 * 47 * This field indicates whether the corresponding PDCP PDU is a 48 * PDCP Data PDU or a PDCP Control PDU. 49 */ 50 enum rte_pdcp_pdu_type { 51 RTE_PDCP_PDU_TYPE_CTRL = 0, 52 RTE_PDCP_PDU_TYPE_DATA = 1, 53 }; 54 55 /** 56 * 6.2.2.1 Data PDU for SRBs 57 */ 58 __extension__ 59 struct __rte_packed_begin rte_pdcp_cp_data_pdu_sn_12_hdr { 60 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN 61 uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ 62 uint8_t r : 4; /**< Reserved */ 63 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN 64 uint8_t r : 4; /**< Reserved */ 65 uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ 66 #endif 67 uint8_t sn_7_0; /**< Sequence number bits 0-7 */ 68 } __rte_packed_end; 69 70 /** 71 * 6.2.2.2 Data PDU for DRBs and MRBs with 12 bits PDCP SN 72 */ 73 __extension__ 74 struct __rte_packed_begin rte_pdcp_up_data_pdu_sn_12_hdr { 75 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN 76 uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ 77 uint8_t r : 3; /**< Reserved */ 78 uint8_t d_c : 1; /**< D/C bit */ 79 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN 80 uint8_t d_c : 1; /**< D/C bit */ 81 uint8_t r : 3; /**< Reserved */ 82 uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ 83 #endif 84 uint8_t sn_7_0; /**< Sequence number bits 0-7 */ 85 } __rte_packed_end; 86 87 /** 88 * 6.2.2.3 Data PDU for DRBs and MRBs with 18 bits PDCP SN 89 */ 90 __extension__ 91 struct __rte_packed_begin rte_pdcp_up_data_pdu_sn_18_hdr { 92 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN 93 uint8_t sn_17_16 : 2; /**< Sequence number bits 16-17 */ 94 uint8_t r : 5; /**< Reserved */ 95 uint8_t d_c : 1; /**< D/C bit */ 96 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN 97 uint8_t d_c : 1; /**< D/C bit */ 98 uint8_t r : 5; /**< Reserved */ 99 uint8_t sn_17_16 : 2; /**< Sequence number bits 16-17 */ 100 #endif 101 uint8_t sn_15_8; /**< Sequence number bits 8-15 */ 102 uint8_t sn_7_0; /**< Sequence number bits 0-7 */ 103 } __rte_packed_end; 104 105 /** 106 * 6.2.3.1 Control PDU for PDCP status report 107 */ 108 __extension__ 109 struct __rte_packed_begin rte_pdcp_up_ctrl_pdu_hdr { 110 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN 111 uint8_t r : 4; /**< Reserved */ 112 uint8_t pdu_type : 3; /**< Control PDU type */ 113 uint8_t d_c : 1; /**< D/C bit */ 114 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN 115 uint8_t d_c : 1; /**< D/C bit */ 116 uint8_t pdu_type : 3; /**< Control PDU type */ 117 uint8_t r : 4; /**< Reserved */ 118 #endif 119 /** 120 * 6.3.9 FMC 121 * 122 * First Missing COUNT. This field indicates the COUNT value of the 123 * first missing PDCP SDU within the reordering window, i.e. RX_DELIV. 124 */ 125 rte_be32_t fmc; 126 /** 127 * 6.3.10 Bitmap 128 * 129 * Length: Variable. The length of the bitmap field can be 0. 130 * 131 * This field indicates which SDUs are missing and which SDUs are 132 * correctly received in the receiving PDCP entity. The bit position of 133 * Nth bit in the Bitmap is N, i.e., the bit position of the first bit 134 * in the Bitmap is 1. 135 */ 136 uint8_t bitmap[]; 137 } __rte_packed_end; 138 139 #endif /* RTE_PDCP_HDR_H */ 140