1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #ifndef _RTE_BBDEV_OP_H_ 6 #define _RTE_BBDEV_OP_H_ 7 8 /** 9 * @file rte_bbdev_op.h 10 * 11 * Defines wireless base band layer 1 operations and capabilities 12 */ 13 14 #include <stdint.h> 15 16 #include <rte_compat.h> 17 #include <rte_common.h> 18 #include <rte_mbuf.h> 19 #include <rte_memory.h> 20 #include <rte_mempool.h> 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Number of columns in sub-block interleaver (36.212, section 5.1.4.1.1) */ 27 #define RTE_BBDEV_TURBO_C_SUBBLOCK (32) 28 /* Maximum size of Transport Block (36.213, Table, Table 7.1.7.2.5-1) */ 29 #define RTE_BBDEV_TURBO_MAX_TB_SIZE (391656) 30 /* Maximum size of Code Block (36.212, Table 5.1.3-3) */ 31 #define RTE_BBDEV_TURBO_MAX_CB_SIZE (6144) 32 /* Maximum size of Code Block */ 33 #define RTE_BBDEV_LDPC_MAX_CB_SIZE (8448) 34 /* Minimum size of Code Block */ 35 #define RTE_BBDEV_LDPC_MIN_CB_SIZE (40) 36 /* Maximum E size we can manage with default mbuf */ 37 #define RTE_BBDEV_LDPC_E_MAX_MBUF (64000) 38 /* Minimum size of Code Block (36.212, Table 5.1.3-3) */ 39 #define RTE_BBDEV_TURBO_MIN_CB_SIZE (40) 40 /* Maximum size of circular buffer */ 41 #define RTE_BBDEV_TURBO_MAX_KW (18528) 42 /* 43 * Turbo: Maximum number of Code Blocks in Transport Block. It is calculated 44 * based on maximum size of one Code Block and one Transport Block 45 * (considering CRC24A and CRC24B): 46 * (391656 + 24) / (6144 - 24) = 64 47 */ 48 #define RTE_BBDEV_TURBO_MAX_CODE_BLOCKS (64) 49 /* LDPC: Maximum number of Code Blocks in Transport Block.*/ 50 #define RTE_BBDEV_LDPC_MAX_CODE_BLOCKS (256) 51 /* 12 CS maximum */ 52 #define RTE_BBDEV_MAX_CS_2 (6) 53 #define RTE_BBDEV_MAX_CS (12) 54 /* MLD-TS up to 4 layers */ 55 #define RTE_BBDEV_MAX_MLD_LAYERS (4) 56 /* 12 SB per RB */ 57 #define RTE_BBDEV_SCPERRB (12) 58 59 /* 60 * Maximum size to be used to manage the enum rte_bbdev_op_type 61 * including padding for future enum insertion. 62 * The enum values must be explicitly kept smaller or equal to this padded maximum size. 63 */ 64 #define RTE_BBDEV_OP_TYPE_SIZE_MAX 8 65 66 /** Flags for turbo decoder operation and capability structure */ 67 enum rte_bbdev_op_td_flag_bitmasks { 68 /** If sub block de-interleaving is to be performed. */ 69 RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE = (1ULL << 0), 70 /** To use CRC Type 24B (otherwise use CRC Type 24A). */ 71 RTE_BBDEV_TURBO_CRC_TYPE_24B = (1ULL << 1), 72 /** If turbo equalization is to be performed. */ 73 RTE_BBDEV_TURBO_EQUALIZER = (1ULL << 2), 74 /** If set, saturate soft output to +/-127 */ 75 RTE_BBDEV_TURBO_SOFT_OUT_SATURATE = (1ULL << 3), 76 /** Set to 1 to start iteration from even, else odd; one iteration = 77 * max_iteration + 0.5 78 */ 79 RTE_BBDEV_TURBO_HALF_ITERATION_EVEN = (1ULL << 4), 80 /** If 0, TD stops after CRC matches; else if 1, runs to end of next 81 * odd iteration after CRC matches 82 */ 83 RTE_BBDEV_TURBO_CONTINUE_CRC_MATCH = (1ULL << 5), 84 /** Set if soft output is required to be output */ 85 RTE_BBDEV_TURBO_SOFT_OUTPUT = (1ULL << 6), 86 /** Set to enable early termination mode */ 87 RTE_BBDEV_TURBO_EARLY_TERMINATION = (1ULL << 7), 88 /** Set if a device supports decoder dequeue interrupts */ 89 RTE_BBDEV_TURBO_DEC_INTERRUPTS = (1ULL << 9), 90 /** Set if positive LLR encoded input is supported. Positive LLR value 91 * represents the level of confidence for bit '1', and vice versa for 92 * bit '0'. 93 * This is mutually exclusive with RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN 94 * when used to formalize the input data format. 95 */ 96 RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN = (1ULL << 10), 97 /** Set if negative LLR encoded input is supported. Negative LLR value 98 * represents the level of confidence for bit '1', and vice versa for 99 * bit '0'. 100 * This is mutually exclusive with RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN 101 * when used to formalize the input data format. 102 */ 103 RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN = (1ULL << 11), 104 /** Set if positive LLR soft output is supported. Positive LLR value 105 * represents the level of confidence for bit '1', and vice versa for 106 * bit '0'. 107 * This is mutually exclusive with 108 * RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT when used to formalize 109 * the input data format. 110 */ 111 RTE_BBDEV_TURBO_POS_LLR_1_BIT_SOFT_OUT = (1ULL << 12), 112 /** Set if negative LLR soft output is supported. Negative LLR value 113 * represents the level of confidence for bit '1', and vice versa for 114 * bit '0'. 115 * This is mutually exclusive with 116 * RTE_BBDEV_TURBO_POS_LLR_1_BIT_SOFT_OUT when used to formalize the 117 * input data format. 118 */ 119 RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT = (1ULL << 13), 120 /** Set if driver supports flexible parallel MAP engine decoding. If 121 * not supported, num_maps (number of MAP engines) argument is unusable. 122 */ 123 RTE_BBDEV_TURBO_MAP_DEC = (1ULL << 14), 124 /** Set if a device supports scatter-gather functionality */ 125 RTE_BBDEV_TURBO_DEC_SCATTER_GATHER = (1ULL << 15), 126 /** Set to keep CRC24B bits appended while decoding. Only usable when 127 * decoding Transport Block mode. 128 */ 129 RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP = (1ULL << 16), 130 /** Set to drop CRC24B bits not to be appended while decoding. 131 */ 132 RTE_BBDEV_TURBO_DEC_CRC_24B_DROP = (1ULL << 17) 133 }; 134 135 136 /** Flags for turbo encoder operation and capability structure */ 137 enum rte_bbdev_op_te_flag_bitmasks { 138 /** Ignore rv_index and set K0 = 0 */ 139 RTE_BBDEV_TURBO_RV_INDEX_BYPASS = (1ULL << 0), 140 /** If rate matching is to be performed */ 141 RTE_BBDEV_TURBO_RATE_MATCH = (1ULL << 1), 142 /** This bit must be set to enable CRC-24B generation */ 143 RTE_BBDEV_TURBO_CRC_24B_ATTACH = (1ULL << 2), 144 /** This bit must be set to enable CRC-24A generation */ 145 RTE_BBDEV_TURBO_CRC_24A_ATTACH = (1ULL << 3), 146 /** Set if a device supports encoder dequeue interrupts */ 147 RTE_BBDEV_TURBO_ENC_INTERRUPTS = (1ULL << 4), 148 /** Set if a device supports scatter-gather functionality */ 149 RTE_BBDEV_TURBO_ENC_SCATTER_GATHER = (1ULL << 5) 150 }; 151 152 /** Flags for LDPC decoder operation and capability structure */ 153 enum rte_bbdev_op_ldpcdec_flag_bitmasks { 154 /** Set for transport block CRC-24A checking */ 155 RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK = (1ULL << 0), 156 /** Set for code block CRC-24B checking */ 157 RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK = (1ULL << 1), 158 /** Set to drop the last CRC bits decoding output */ 159 RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP = (1ULL << 2), 160 /** Set for transport block CRC-16 checking */ 161 RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK = (1ULL << 3), 162 /** Set for bit-level de-interleaver bypass on Rx stream. */ 163 RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 4), 164 /** Set for HARQ combined input stream enable. */ 165 RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 5), 166 /** Set for HARQ combined output stream enable. */ 167 RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 6), 168 /** Set for LDPC decoder bypass. 169 * RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE must be set. 170 */ 171 RTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 7), 172 /** Set for soft-output stream enable */ 173 RTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 8), 174 /** Set for Rate-Matching bypass on soft-out stream. */ 175 RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 9), 176 /** Set for bit-level de-interleaver bypass on soft-output stream. */ 177 RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 10), 178 /** Set for iteration stopping on successful decode condition 179 * i.e. a successful syndrome check. 180 */ 181 RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 11), 182 /** Set if a device supports decoder dequeue interrupts. */ 183 RTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 12), 184 /** Set if a device supports scatter-gather functionality. */ 185 RTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 13), 186 /** Set if a device supports input/output HARQ compression. */ 187 RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION = (1ULL << 14), 188 /** Set if a device supports input LLR compression. */ 189 RTE_BBDEV_LDPC_LLR_COMPRESSION = (1ULL << 15), 190 /** Set if a device supports HARQ input from 191 * device's internal memory. 192 */ 193 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE = (1ULL << 16), 194 /** Set if a device supports HARQ output to 195 * device's internal memory. 196 */ 197 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE = (1ULL << 17), 198 /** Set if a device supports loop-back access to 199 * HARQ internal memory. Intended for troubleshooting. 200 */ 201 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 18), 202 /** Set if a device includes LLR filler bits in the circular buffer 203 * for HARQ memory. If not set, it is assumed the filler bits are not 204 * in HARQ memory and handled directly by the LDPC decoder. 205 */ 206 RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19), 207 /** Set if a device supports input/output HARQ 4bits compression. */ 208 RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION = (1ULL << 20) 209 }; 210 211 /** Flags for LDPC encoder operation and capability structure */ 212 enum rte_bbdev_op_ldpcenc_flag_bitmasks { 213 /** Set for bit-level interleaver bypass on output stream. */ 214 RTE_BBDEV_LDPC_INTERLEAVER_BYPASS = (1ULL << 0), 215 /** If rate matching is to be performed */ 216 RTE_BBDEV_LDPC_RATE_MATCH = (1ULL << 1), 217 /** Set for transport block CRC-24A attach */ 218 RTE_BBDEV_LDPC_CRC_24A_ATTACH = (1ULL << 2), 219 /** Set for code block CRC-24B attach */ 220 RTE_BBDEV_LDPC_CRC_24B_ATTACH = (1ULL << 3), 221 /** Set for code block CRC-16 attach */ 222 RTE_BBDEV_LDPC_CRC_16_ATTACH = (1ULL << 4), 223 /** Set if a device supports encoder dequeue interrupts. */ 224 RTE_BBDEV_LDPC_ENC_INTERRUPTS = (1ULL << 5), 225 /** Set if a device supports scatter-gather functionality. */ 226 RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6), 227 /** Set if a device supports concatenation of non byte aligned output */ 228 RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7) 229 }; 230 231 /** Flags for FFT operation and capability structure. */ 232 enum rte_bbdev_op_fft_flag_bitmasks { 233 /** Flexible windowing capability. */ 234 RTE_BBDEV_FFT_WINDOWING = (1ULL << 0), 235 /** Flexible adjustment of Cyclic Shift time offset. */ 236 RTE_BBDEV_FFT_CS_ADJUSTMENT = (1ULL << 1), 237 /** Set for bypass the DFT and get directly into iDFT input. */ 238 RTE_BBDEV_FFT_DFT_BYPASS = (1ULL << 2), 239 /** Set for bypass the IDFT and get directly the DFT output. */ 240 RTE_BBDEV_FFT_IDFT_BYPASS = (1ULL << 3), 241 /** Set for bypass time domain windowing. */ 242 RTE_BBDEV_FFT_WINDOWING_BYPASS = (1ULL << 4), 243 /** Set for optional power measurement on DFT output. */ 244 RTE_BBDEV_FFT_POWER_MEAS = (1ULL << 5), 245 /** Set if the input data used FP16 format. */ 246 RTE_BBDEV_FFT_FP16_INPUT = (1ULL << 6), 247 /** Set if the output data uses FP16 format. */ 248 RTE_BBDEV_FFT_FP16_OUTPUT = (1ULL << 7), 249 /** Flexible adjustment of Timing offset adjustment per CS. */ 250 RTE_BBDEV_FFT_TIMING_OFFSET_PER_CS = (1ULL << 8), 251 /** Flexible adjustment of Timing error correction per CS. */ 252 RTE_BBDEV_FFT_TIMING_ERROR = (1ULL << 9), 253 /** Set for optional frequency domain dewindowing. */ 254 RTE_BBDEV_FFT_DEWINDOWING = (1ULL << 10), 255 /** Flexible adjustment of frequency resampling mode. */ 256 RTE_BBDEV_FFT_FREQ_RESAMPLING = (1ULL << 11) 257 }; 258 259 /** Flags for MLDTS operation and capability structure */ 260 enum rte_bbdev_op_mldts_flag_bitmasks { 261 /** Set if the device supports C/R repetition options. */ 262 RTE_BBDEV_MLDTS_REP = (1ULL << 0), 263 }; 264 265 /** Flags for the Code Block/Transport block mode */ 266 enum rte_bbdev_op_cb_mode { 267 /** One operation is one or fraction of one transport block */ 268 RTE_BBDEV_TRANSPORT_BLOCK = 0, 269 /** One operation is one code block mode */ 270 RTE_BBDEV_CODE_BLOCK = 1, 271 }; 272 273 /** Data input and output buffer for BBDEV operations */ 274 struct rte_bbdev_op_data { 275 /** The mbuf data structure representing the data for BBDEV operation. 276 * 277 * This mbuf pointer can point to one Code Block (CB) data buffer or 278 * multiple CBs contiguously located next to each other. 279 * A Transport Block (TB) represents a whole piece of data that is 280 * divided into one or more CBs. Maximum number of CBs can be contained 281 * in one TB is defined by RTE_BBDEV_(TURBO/LDPC)_MAX_CODE_BLOCKS. 282 * 283 * An mbuf data structure cannot represent more than one TB. The 284 * smallest piece of data that can be contained in one mbuf is one CB. 285 * An mbuf can include one contiguous CB, subset of contiguous CBs that 286 * are belonging to one TB, or all contiguous CBs that are belonging to 287 * one TB. 288 * 289 * If a BBDEV PMD supports the extended capability "Scatter-Gather", 290 * then it is capable of collecting (gathering) non-contiguous 291 * (scattered) data from multiple locations in the memory. 292 * This capability is reported by the capability flags: 293 * - RTE_BBDEV_(TURBO/LDPC)_ENC_SCATTER_GATHER and 294 * - RTE_BBDEV_(TURBO/LDPC)_DEC_SCATTER_GATHER. 295 * Only if a BBDEV PMD supports this feature, chained mbuf data 296 * structures are accepted. A chained mbuf can represent one 297 * non-contiguous CB or multiple non-contiguous CBs. 298 * If BBDEV PMD does not support this feature, it will assume inbound 299 * mbuf data contains one segment. 300 * 301 * The output mbuf data though is always one segment, even if the input 302 * was a chained mbuf. 303 */ 304 struct rte_mbuf *data; 305 /** The starting point of the BBDEV (encode/decode) operation, 306 * in bytes. 307 * 308 * BBDEV starts to read data past this offset. 309 * In case of chained mbuf, this offset applies only to the first mbuf 310 * segment. 311 */ 312 uint32_t offset; 313 /** The total data length to be processed in one operation, in bytes. 314 * 315 * In case the mbuf data is representing one CB, this is the length of 316 * the CB undergoing the operation. 317 * If it's for multiple CBs, this is the total length of those CBs 318 * undergoing the operation. 319 * If it is for one TB, this is the total length of the TB under 320 * operation. 321 * 322 * In case of chained mbuf, this data length includes the lengths of the 323 * "scattered" data segments undergoing the operation. 324 */ 325 uint32_t length; 326 }; 327 328 /** Turbo decode code block parameters */ 329 struct rte_bbdev_op_dec_turbo_cb_params { 330 /** The K size of the input CB, in bits [40:6144], as specified in 331 * 3GPP TS 36.212. 332 * This size is inclusive of CRC bits, regardless whether it was 333 * pre-calculated by the application or not. 334 */ 335 uint16_t k; 336 /** The E length of the CB rate matched LLR output, in bytes, as in 337 * 3GPP TS 36.212. 338 */ 339 uint32_t e; 340 }; 341 342 /** LDPC decode code block parameters */ 343 struct rte_bbdev_op_dec_ldpc_cb_params { 344 /** Rate matching output sequence length in bits or LLRs. 345 * [3GPP TS38.212, section 5.4.2.1] 346 */ 347 uint32_t e; 348 }; 349 350 /** Turbo decode transport block parameters */ 351 struct rte_bbdev_op_dec_turbo_tb_params { 352 /** The K- size of the input CB, in bits [40:6144], that is in the 353 * Turbo operation when r < C-, as in 3GPP TS 36.212. 354 */ 355 uint16_t k_neg; 356 /** The K+ size of the input CB, in bits [40:6144], that is in the 357 * Turbo operation when r >= C-, as in 3GPP TS 36.212. 358 */ 359 uint16_t k_pos; 360 /** The number of CBs that have K- size, [0:63] */ 361 uint8_t c_neg; 362 /** The total number of CBs in the TB, 363 * [1:RTE_BBDEV_TURBO_MAX_CODE_BLOCKS] 364 */ 365 uint8_t c; 366 /** The number of CBs that uses Ea before switching to Eb, [0:63] */ 367 uint8_t cab; 368 /** The E size of the CB rate matched output to use in the Turbo 369 * operation when r < cab 370 */ 371 uint32_t ea; 372 /** The E size of the CB rate matched output to use in the Turbo 373 * operation when r >= cab 374 */ 375 uint32_t eb; 376 /** The index of the first CB in the inbound mbuf data, default is 0 */ 377 uint8_t r; 378 }; 379 380 /** LDPC decode transport block parameters */ 381 struct rte_bbdev_op_dec_ldpc_tb_params { 382 /** Ea, length after rate matching in bits, r < cab. 383 * [3GPP TS38.212, section 5.4.2.1] 384 */ 385 uint32_t ea; 386 /** Eb, length after rate matching in bits, r >= cab. 387 * [3GPP TS38.212, section 5.4.2.1] 388 */ 389 uint32_t eb; 390 /** The total number of CBs in the TB or partial TB 391 * [1:RTE_BBDEV_LDPC_MAX_CODE_BLOCKS] 392 */ 393 uint8_t c; 394 /** The index of the first CB in the inbound mbuf data, default is 0 */ 395 uint8_t r; 396 /** The number of CBs that use Ea before switching to Eb, [0:63] */ 397 uint8_t cab; 398 }; 399 400 /** Operation structure for Turbo decode. 401 * An operation can be performed on one CB at a time "CB-mode". 402 * An operation can be performed on one or multiple CBs that logically 403 * belong to one TB "TB-mode". 404 * The provided K size parameter of the CB is its size coming from the 405 * decode operation. 406 * CRC24A/B check is requested by the application by setting the flag 407 * RTE_BBDEV_TURBO_CRC_TYPE_24B for CRC24B check or CRC24A otherwise. 408 * In TB-mode, BBDEV concatenates the decoded CBs one next to the other with 409 * relevant CRC24B in between. 410 * 411 * The input encoded CB data is the Virtual Circular Buffer data stream, wk, 412 * with the null padding included as described in 3GPP TS 36.212 413 * section 5.1.4.1.2 and shown in 3GPP TS 36.212 section 5.1.4.1 Figure 5.1.4-1. 414 * The size of the virtual circular buffer is 3*Kpi, where Kpi is the 32 byte 415 * aligned value of K, as specified in 3GPP TS 36.212 section 5.1.4.1.1. 416 * 417 * Each byte in the input circular buffer is the LLR value of each bit of the 418 * original CB. 419 * 420 * Hard output is a mandatory capability that all BBDEV PMDs support. This is 421 * the decoded CBs of K sizes (CRC24A/B is the last 24-bit in each decoded CB). 422 * Soft output is an optional capability for BBDEV PMDs. If supported, an LLR 423 * rate matched output is computed in the soft_output buffer structure. 424 * 425 * The output mbuf data structure is expected to be allocated by the 426 * application with enough room for the output data. 427 */ 428 429 /* Structure rte_bbdev_op_turbo_dec 8< */ 430 struct rte_bbdev_op_turbo_dec { 431 /** The Virtual Circular Buffer, wk, size 3*Kpi for each CB */ 432 struct rte_bbdev_op_data input; 433 /** The hard decisions buffer for the decoded output, 434 * size K for each CB 435 */ 436 struct rte_bbdev_op_data hard_output; 437 /** The soft LLR output buffer - optional */ 438 struct rte_bbdev_op_data soft_output; 439 440 /** Flags from rte_bbdev_op_td_flag_bitmasks */ 441 uint32_t op_flags; 442 443 /** Rv index for rate matching [0:3] */ 444 uint8_t rv_index; 445 /** The minimum number of iterations to perform in decoding all CBs in 446 * this operation - input 447 */ 448 uint8_t iter_min:4; 449 /** The maximum number of iterations to perform in decoding all CBs in 450 * this operation - input 451 */ 452 uint8_t iter_max:4; 453 /** The maximum number of iterations that were performed in decoding 454 * all CBs in this decode operation - output 455 */ 456 uint8_t iter_count; 457 /** 5 bit extrinsic scale (scale factor on extrinsic info) */ 458 uint8_t ext_scale; 459 /** Number of MAP engines to use in decode, 460 * must be power of 2 (or 0 to auto-select) 461 */ 462 uint8_t num_maps; 463 464 /** [0 - TB : 1 - CB] */ 465 uint8_t code_block_mode; 466 union { 467 /** Struct which stores Code Block specific parameters */ 468 struct rte_bbdev_op_dec_turbo_cb_params cb_params; 469 /** Struct which stores Transport Block specific parameters */ 470 struct rte_bbdev_op_dec_turbo_tb_params tb_params; 471 }; 472 }; 473 /* >8 End of structure rte_bbdev_op_turbo_dec. */ 474 475 /** Operation structure for LDPC decode. 476 * 477 * An operation can be performed on one CB at a time "CB-mode". 478 * An operation can also be performed on one or multiple CBs that logically 479 * belong to a TB "TB-mode" (Currently not supported). 480 * 481 * The input encoded CB data is the Virtual Circular Buffer data stream. 482 * 483 * Each byte in the input circular buffer is the LLR value of each bit of the 484 * original CB. 485 * 486 * Hard output is a mandatory capability that all BBDEV PMDs support. This is 487 * the decoded CBs (CRC24A/B is the last 24-bit in each decoded CB). 488 * 489 * Soft output is an optional capability for BBDEV PMDs. If supported, an LLR 490 * rate matched output is computed in the soft_output buffer structure. 491 * These are A Posteriori Probabilities (APP) LLR samples for coded bits. 492 * 493 * HARQ combined output is an optional capability for BBDEV PMDs. 494 * If supported, a LLR output is streamed to the harq_combined_output 495 * buffer. 496 * 497 * HARQ combined input is an optional capability for BBDEV PMDs. 498 * If supported, a LLR input is streamed from the harq_combined_input 499 * buffer. 500 * 501 * The output mbuf data structure is expected to be allocated by the 502 * application with enough room for the output data. 503 */ 504 505 /* Structure rte_bbdev_op_ldpc_dec 8< */ 506 struct rte_bbdev_op_ldpc_dec { 507 /** The Virtual Circular Buffer for this code block, one LLR 508 * per bit of the original CB. 509 */ 510 struct rte_bbdev_op_data input; 511 /** The hard decisions buffer for the decoded output, 512 * size K for each CB 513 */ 514 struct rte_bbdev_op_data hard_output; 515 /** The soft LLR output LLR stream buffer - optional */ 516 struct rte_bbdev_op_data soft_output; 517 /** The HARQ combined LLR stream input buffer - optional */ 518 struct rte_bbdev_op_data harq_combined_input; 519 /** The HARQ combined LLR stream output buffer - optional */ 520 struct rte_bbdev_op_data harq_combined_output; 521 522 /** Flags from rte_bbdev_op_ldpcdec_flag_bitmasks */ 523 uint32_t op_flags; 524 525 /** Rate matching redundancy version 526 * [3GPP TS38.212, section 5.4.2.1] 527 */ 528 uint8_t rv_index; 529 /** The maximum number of iterations to perform in decoding CB in 530 * this operation - input 531 */ 532 uint8_t iter_max; 533 /** The number of iterations that were performed in decoding 534 * CB in this decode operation - output 535 */ 536 uint8_t iter_count; 537 /** 1: LDPC Base graph 1, 2: LDPC Base graph 2. 538 * [3GPP TS38.212, section 5.2.2] 539 */ 540 uint8_t basegraph; 541 /** Zc, LDPC lifting size. 542 * [3GPP TS38.212, section 5.2.2] 543 */ 544 uint16_t z_c; 545 /** Ncb, length of the circular buffer in bits. 546 * [3GPP TS38.212, section 5.4.2.1] 547 */ 548 uint16_t n_cb; 549 /** Qm, modulation order {1,2,4,6,8}. 550 * [3GPP TS38.212, section 5.4.2.2] 551 */ 552 uint8_t q_m; 553 /** Number of Filler bits, n_filler = K – K’ 554 * [3GPP TS38.212 section 5.2.2] 555 */ 556 uint16_t n_filler; 557 /** [0 - TB : 1 - CB] */ 558 uint8_t code_block_mode; 559 union { 560 /** Struct which stores Code Block specific parameters */ 561 struct rte_bbdev_op_dec_ldpc_cb_params cb_params; 562 /** Struct which stores Transport Block specific parameters */ 563 struct rte_bbdev_op_dec_ldpc_tb_params tb_params; 564 }; 565 /** Optional k0 Rate matching starting position, overrides rv_index when non null 566 * [3GPP TS38.212, section 5.4.2.1] 567 */ 568 uint16_t k0; 569 }; 570 /* >8 End of structure rte_bbdev_op_ldpc_dec. */ 571 572 /** Turbo encode code block parameters */ 573 struct rte_bbdev_op_enc_turbo_cb_params { 574 /** The K size of the input CB, in bits [40:6144], as specified in 575 * 3GPP TS 36.212. 576 * This size is inclusive of CRC24A, regardless whether it was 577 * pre-calculated by the application or not. 578 */ 579 uint16_t k; 580 /** The E length of the CB rate matched output, in bits, as in 581 * 3GPP TS 36.212. 582 */ 583 uint32_t e; 584 /** The Ncb soft buffer size of the CB rate matched output [K:3*Kpi], 585 * in bits, as specified in 3GPP TS 36.212. 586 */ 587 uint16_t ncb; 588 }; 589 590 /** Turbo encode transport block parameters */ 591 struct rte_bbdev_op_enc_turbo_tb_params { 592 /** The K- size of the input CB, in bits [40:6144], that is in the 593 * Turbo operation when r < C-, as in 3GPP TS 36.212. 594 * This size is inclusive of CRC24B, regardless whether it was 595 * pre-calculated and appended by the application or not. 596 */ 597 uint16_t k_neg; 598 /** The K+ size of the input CB, in bits [40:6144], that is in the 599 * Turbo operation when r >= C-, as in 3GPP TS 36.212. 600 * This size is inclusive of CRC24B, regardless whether it was 601 * pre-calculated and appended by the application or not. 602 */ 603 uint16_t k_pos; 604 /** The number of CBs that have K- size, [0:63] */ 605 uint8_t c_neg; 606 /** The total number of CBs in the TB, 607 * [1:RTE_BBDEV_TURBO_MAX_CODE_BLOCKS] 608 */ 609 uint8_t c; 610 /** The number of CBs that uses Ea before switching to Eb, [0:63] */ 611 uint8_t cab; 612 /** The E size of the CB rate matched output to use in the Turbo 613 * operation when r < cab 614 */ 615 uint32_t ea; 616 /** The E size of the CB rate matched output to use in the Turbo 617 * operation when r >= cab 618 */ 619 uint32_t eb; 620 /** The Ncb soft buffer size for the rate matched CB that is used in 621 * the Turbo operation when r < C-, [K:3*Kpi] 622 */ 623 uint16_t ncb_neg; 624 /** The Ncb soft buffer size for the rate matched CB that is used in 625 * the Turbo operation when r >= C-, [K:3*Kpi] 626 */ 627 uint16_t ncb_pos; 628 /** The index of the first CB in the inbound mbuf data, default is 0 */ 629 uint8_t r; 630 }; 631 632 /** LDPC encode code block parameters */ 633 struct rte_bbdev_op_enc_ldpc_cb_params { 634 /** E, length after rate matching in bits. 635 * [3GPP TS38.212, section 5.4.2.1] 636 */ 637 uint32_t e; 638 }; 639 640 /** LDPC encode transport block parameters */ 641 struct rte_bbdev_op_enc_ldpc_tb_params { 642 /** Ea, length after rate matching in bits, r < cab. 643 * [3GPP TS38.212, section 5.4.2.1] 644 */ 645 uint32_t ea; 646 /** Eb, length after rate matching in bits, r >= cab. 647 * [3GPP TS38.212, section 5.4.2.1] 648 */ 649 uint32_t eb; 650 /** The total number of CBs in the TB or partial TB 651 * [1:RTE_BBDEV_LDPC_MAX_CODE_BLOCKS] 652 */ 653 uint8_t c; 654 /** The index of the first CB in the inbound mbuf data, default is 0 */ 655 uint8_t r; 656 /** The number of CBs that use Ea before switching to Eb, [0:63] */ 657 uint8_t cab; 658 }; 659 660 /** Operation structure for Turbo encode. 661 * An operation can be performed on one CB at a time "CB-mode". 662 * An operation can pbe erformd on one or multiple CBs that logically 663 * belong to one TB "TB-mode". 664 * 665 * In CB-mode, CRC24A/B is an optional operation. K size parameter is not 666 * affected by CRC24A/B inclusion, this only affects the inbound mbuf data 667 * length. Not all BBDEV PMDs are capable of CRC24A/B calculation. Flags 668 * RTE_BBDEV_TURBO_CRC_24A_ATTACH and RTE_BBDEV_TURBO_CRC_24B_ATTACH informs 669 * the application with relevant capability. These flags can be set in the 670 * op_flags parameter to indicate BBDEV to calculate and append CRC24A to CB 671 * before going forward with Turbo encoding. 672 * 673 * In TB-mode, CRC24A is assumed to be pre-calculated and appended to the 674 * inbound TB mbuf data buffer. 675 * 676 * The output mbuf data structure is expected to be allocated by the 677 * application with enough room for the output data. 678 */ 679 680 /* Structure rte_bbdev_op_turbo_enc 8< */ 681 struct rte_bbdev_op_turbo_enc { 682 /** The input CB or TB data */ 683 struct rte_bbdev_op_data input; 684 /** The rate matched CB or TB output buffer */ 685 struct rte_bbdev_op_data output; 686 /** Flags from rte_bbdev_op_te_flag_bitmasks */ 687 uint32_t op_flags; 688 689 /** Rv index for rate matching [0:3] */ 690 uint8_t rv_index; 691 /** [0 - TB : 1 - CB] */ 692 uint8_t code_block_mode; 693 union { 694 /** Struct which stores Code Block specific parameters */ 695 struct rte_bbdev_op_enc_turbo_cb_params cb_params; 696 /** Struct which stores Transport Block specific parameters */ 697 struct rte_bbdev_op_enc_turbo_tb_params tb_params; 698 }; 699 }; 700 /* >8 End of structure rte_bbdev_op_turbo_enc. */ 701 702 /** Operation structure for LDPC encode. 703 * An operation can be performed on one CB at a time "CB-mode". 704 * An operation can be performed on one or multiple CBs that logically 705 * belong to a TB "TB-mode". 706 * 707 * The input data is the CB or TB input to the decoder. 708 * 709 * The output data is the ratematched CB or TB data, or the output after 710 * bit-selection if RTE_BBDEV_LDPC_INTERLEAVER_BYPASS is set. 711 * 712 * The output mbuf data structure is expected to be allocated by the 713 * application with enough room for the output data. 714 */ 715 716 /* Structure rte_bbdev_op_ldpc_enc 8< */ 717 struct rte_bbdev_op_ldpc_enc { 718 /** The input TB or CB data */ 719 struct rte_bbdev_op_data input; 720 /** The rate matched TB or CB output buffer */ 721 struct rte_bbdev_op_data output; 722 723 /** Flags from rte_bbdev_op_ldpcenc_flag_bitmasks */ 724 uint32_t op_flags; 725 726 /** Rate matching redundancy version */ 727 uint8_t rv_index; 728 /** 1: LDPC Base graph 1, 2: LDPC Base graph 2. 729 * [3GPP TS38.212, section 5.2.2] 730 */ 731 uint8_t basegraph; 732 /** Zc, LDPC lifting size. 733 * [3GPP TS38.212, section 5.2.2] 734 */ 735 uint16_t z_c; 736 /** Ncb, length of the circular buffer in bits. 737 * [3GPP TS38.212, section 5.4.2.1] 738 */ 739 uint16_t n_cb; 740 /** Qm, modulation order {2,4,6,8,10}. 741 * [3GPP TS38.212, section 5.4.2.2] 742 */ 743 uint8_t q_m; 744 /** Number of Filler bits, n_filler = K – K’ 745 * [3GPP TS38.212 section 5.2.2] 746 */ 747 uint16_t n_filler; 748 /** [0 - TB : 1 - CB] */ 749 uint8_t code_block_mode; 750 union { 751 /** Struct which stores Code Block specific parameters */ 752 struct rte_bbdev_op_enc_ldpc_cb_params cb_params; 753 /** Struct which stores Transport Block specific parameters */ 754 struct rte_bbdev_op_enc_ldpc_tb_params tb_params; 755 }; 756 }; 757 /* >8 End of structure rte_bbdev_op_ldpc_enc. */ 758 759 /** Operation structure for FFT processing. 760 * 761 * The operation processes the data for multiple antennas in a single call 762 * (i.e. for all the REs belonging to a given SRS sequence for instance). 763 * 764 * The output mbuf data structure is expected to be allocated by the 765 * application with enough room for the output data. 766 */ 767 768 /* Structure rte_bbdev_op_fft 8< */ 769 struct rte_bbdev_op_fft { 770 /** Input data starting from first antenna. */ 771 struct rte_bbdev_op_data base_input; 772 /** Output data starting from first antenna and first cyclic shift. */ 773 struct rte_bbdev_op_data base_output; 774 /** Optional frequency window input data. */ 775 struct rte_bbdev_op_data dewindowing_input; 776 /** Optional power measurement output data. */ 777 struct rte_bbdev_op_data power_meas_output; 778 /** Flags from rte_bbdev_op_fft_flag_bitmasks. */ 779 uint32_t op_flags; 780 /** Input sequence size in 32-bits points. */ 781 uint16_t input_sequence_size; 782 /** Padding at the start of the sequence. */ 783 uint16_t input_leading_padding; 784 /** Output sequence size in 32-bits points. */ 785 uint16_t output_sequence_size; 786 /** Depadding at the start of the DFT output. */ 787 uint16_t output_leading_depadding; 788 /** Window index being used for each cyclic shift output. */ 789 uint8_t window_index[RTE_BBDEV_MAX_CS_2]; 790 /** Bitmap of the cyclic shift output requested. */ 791 uint16_t cs_bitmap; 792 /** Number of antennas as a log2 – 8 to 128. */ 793 uint8_t num_antennas_log2; 794 /** iDFT size as a log2 - 32 to 2048. */ 795 uint8_t idft_log2; 796 /** DFT size as a log2 - 8 to 2048. */ 797 uint8_t dft_log2; 798 /** Adjustment of position of the cyclic shifts - -31 to 31. */ 799 int8_t cs_time_adjustment; 800 /** iDFT shift down. */ 801 int8_t idft_shift; 802 /** DFT shift down. */ 803 int8_t dft_shift; 804 /** NCS reciprocal factor. */ 805 uint16_t ncs_reciprocal; 806 /** Power measurement out shift down. */ 807 uint16_t power_shift; 808 /** Adjust the FP6 exponent for INT<->FP16 conversion. */ 809 uint16_t fp16_exp_adjust; 810 /** Frequency resampling : 0: Transparent Mode1: 4/3 Resample2: 2/3 Resample. */ 811 int8_t freq_resample_mode; 812 /** Output depadded size prior to frequency resampling. */ 813 uint16_t output_depadded_size; 814 /** Time error correction initial phase. */ 815 uint16_t cs_theta_0[RTE_BBDEV_MAX_CS]; 816 /** Time error correction phase increment. */ 817 uint32_t cs_theta_d[RTE_BBDEV_MAX_CS]; 818 /* Time offset per CS of time domain samples. */ 819 int8_t time_offset[RTE_BBDEV_MAX_CS]; 820 }; 821 /* >8 End of structure rte_bbdev_op_fft. */ 822 823 /** Operation structure for MLDTS processing. 824 * 825 * The output mbuf data structure is expected to be allocated by the 826 * application with enough room for the output data. 827 */ 828 829 /* Structure rte_bbdev_op_mldts 8< */ 830 struct rte_bbdev_op_mldts { 831 /** Input data QHy from QR decomposition. */ 832 struct rte_bbdev_op_data qhy_input; 833 /** Input data R from QR decomposition. */ 834 struct rte_bbdev_op_data r_input; 835 /** Output data post MLD-TS. */ 836 struct rte_bbdev_op_data output; 837 /** Flags from *rte_bbdev_op_MLDTS_flag_bitmasks*. */ 838 uint32_t op_flags; 839 /** Number of RBs. */ 840 uint16_t num_rbs; 841 /** Number of layers 2->4. */ 842 uint16_t num_layers; 843 /** Modulation order (2->8 QPSK to 256QAM). */ 844 uint8_t q_m[RTE_BBDEV_MAX_MLD_LAYERS]; 845 /** Row repetition for the same R matrix - subcarriers. */ 846 uint8_t r_rep; 847 /** Column repetition for the same R matrix - symbols. */ 848 uint8_t c_rep; 849 }; 850 /* >8 End of structure rte_bbdev_op_mldts. */ 851 852 /** List of the capabilities for the Turbo Decoder */ 853 struct rte_bbdev_op_cap_turbo_dec { 854 /** Flags from rte_bbdev_op_td_flag_bitmasks */ 855 uint32_t capability_flags; 856 /** Maximal LLR absolute value. Acceptable LLR values lie in range 857 * [-max_llr_modulus, max_llr_modulus]. 858 */ 859 int8_t max_llr_modulus; 860 /** Num input code block buffers */ 861 uint8_t num_buffers_src; /**< Num input code block buffers */ 862 /** Num hard output code block buffers */ 863 uint8_t num_buffers_hard_out; 864 /** Num soft output code block buffers if supported by the driver */ 865 uint8_t num_buffers_soft_out; 866 }; 867 868 /** List of the capabilities for the Turbo Encoder */ 869 struct rte_bbdev_op_cap_turbo_enc { 870 /** Flags from rte_bbdev_op_te_flag_bitmasks */ 871 uint32_t capability_flags; 872 /** Num input code block buffers */ 873 uint8_t num_buffers_src; 874 /** Num output code block buffers */ 875 uint8_t num_buffers_dst; 876 }; 877 878 /** List of the capabilities for the LDPC Decoder */ 879 struct rte_bbdev_op_cap_ldpc_dec { 880 /** Flags from rte_bbdev_op_ldpcdec_flag_bitmasks */ 881 uint32_t capability_flags; 882 /** LLR size in bits. LLR is a two’s complement number. */ 883 int8_t llr_size; 884 /** LLR numbers of decimals bit for arithmetic representation */ 885 int8_t llr_decimals; 886 /** Num input code block buffers */ 887 uint16_t num_buffers_src; 888 /** Num hard output code block buffers */ 889 uint16_t num_buffers_hard_out; 890 /** Num soft output code block buffers if supported by the driver */ 891 uint16_t num_buffers_soft_out; 892 }; 893 894 /** List of the capabilities for the LDPC Encoder */ 895 struct rte_bbdev_op_cap_ldpc_enc { 896 /** Flags from rte_bbdev_op_ldpcenc_flag_bitmasks */ 897 uint32_t capability_flags; 898 /** Num input code block buffers */ 899 uint16_t num_buffers_src; 900 /** Num output code block buffers */ 901 uint16_t num_buffers_dst; 902 }; 903 904 /** List of the capabilities for the FFT. */ 905 struct rte_bbdev_op_cap_fft { 906 /** Flags from *rte_bbdev_op_fft_flag_bitmasks*. */ 907 uint32_t capability_flags; 908 /** Num input code block buffers. */ 909 uint16_t num_buffers_src; 910 /** Num output code block buffers. */ 911 uint16_t num_buffers_dst; 912 /** Number of FFT windows supported. */ 913 uint16_t fft_windows_num; 914 }; 915 916 /** List of the capabilities for the MLD */ 917 struct rte_bbdev_op_cap_mld { 918 /** Flags from rte_bbdev_op_mldts_flag_bitmasks */ 919 uint32_t capability_flags; 920 /** Number of input code block buffers. */ 921 uint16_t num_buffers_src; 922 /** Number of output code block buffers. */ 923 uint16_t num_buffers_dst; 924 }; 925 926 /** Different operation types supported by the device. 927 * The related macro RTE_BBDEV_OP_TYPE_SIZE_MAX can be used as an absolute maximum for 928 * notably sizing array while allowing for future enumeration insertion. 929 */ 930 enum rte_bbdev_op_type { 931 RTE_BBDEV_OP_NONE, /**< Dummy operation that does nothing */ 932 RTE_BBDEV_OP_TURBO_DEC, /**< Turbo decode */ 933 RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */ 934 RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */ 935 RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */ 936 RTE_BBDEV_OP_FFT, /**< FFT */ 937 RTE_BBDEV_OP_MLDTS, /**< MLD-TS */ 938 /* Note: RTE_BBDEV_OP_TYPE_SIZE_MAX must be larger or equal to maximum enum value */ 939 }; 940 941 /** Bit indexes of possible errors reported through status field */ 942 enum { 943 RTE_BBDEV_DRV_ERROR, 944 RTE_BBDEV_DATA_ERROR, 945 RTE_BBDEV_CRC_ERROR, 946 RTE_BBDEV_SYNDROME_ERROR, 947 RTE_BBDEV_ENGINE_ERROR 948 }; 949 950 /** Structure specifying a single encode operation */ 951 struct rte_bbdev_enc_op { 952 /** Status of operation that was performed */ 953 int status; 954 /** Mempool which op instance is in */ 955 struct rte_mempool *mempool; 956 /** Opaque pointer for user data */ 957 void *opaque_data; 958 union { 959 /** Contains turbo decoder specific parameters */ 960 struct rte_bbdev_op_turbo_enc turbo_enc; 961 /** Contains LDPC decoder specific parameters */ 962 struct rte_bbdev_op_ldpc_enc ldpc_enc; 963 }; 964 }; 965 966 /** Structure specifying a single decode operation */ 967 struct rte_bbdev_dec_op { 968 /** Status of operation that was performed */ 969 int status; 970 /** Mempool which op instance is in */ 971 struct rte_mempool *mempool; 972 /** Opaque pointer for user data */ 973 void *opaque_data; 974 union { 975 /** Contains turbo decoder specific parameters */ 976 struct rte_bbdev_op_turbo_dec turbo_dec; 977 /** Contains LDPC decoder specific parameters */ 978 struct rte_bbdev_op_ldpc_dec ldpc_dec; 979 }; 980 }; 981 982 /** Structure specifying a single FFT operation. */ 983 struct rte_bbdev_fft_op { 984 /** Status of operation performed. */ 985 int status; 986 /** Mempool used for op instance. */ 987 struct rte_mempool *mempool; 988 /** Opaque pointer for user data. */ 989 void *opaque_data; 990 /** Contains turbo decoder specific parameters. */ 991 struct rte_bbdev_op_fft fft; 992 }; 993 994 /** Structure specifying a single mldts operation */ 995 struct rte_bbdev_mldts_op { 996 /** Status of operation that was performed. */ 997 int status; 998 /** Mempool which op instance is in. */ 999 struct rte_mempool *mempool; 1000 /** Opaque pointer for user data. */ 1001 void *opaque_data; 1002 /** Contains turbo decoder specific parameters. */ 1003 struct rte_bbdev_op_mldts mldts; 1004 }; 1005 1006 /** Operation capabilities supported by a device */ 1007 struct rte_bbdev_op_cap { 1008 enum rte_bbdev_op_type type; /**< Type of operation */ 1009 union { 1010 struct rte_bbdev_op_cap_turbo_dec turbo_dec; 1011 struct rte_bbdev_op_cap_turbo_enc turbo_enc; 1012 struct rte_bbdev_op_cap_ldpc_dec ldpc_dec; 1013 struct rte_bbdev_op_cap_ldpc_enc ldpc_enc; 1014 struct rte_bbdev_op_cap_fft fft; 1015 struct rte_bbdev_op_cap_mld mld; 1016 } cap; /**< Operation-type specific capabilities */ 1017 }; 1018 1019 /** @internal Private data structure stored with operation pool. */ 1020 struct rte_bbdev_op_pool_private { 1021 enum rte_bbdev_op_type type; /**< Type of operations in a pool */ 1022 }; 1023 1024 /** 1025 * Converts queue operation type from enum to string 1026 * 1027 * @param op_type 1028 * Operation type as enum 1029 * 1030 * @returns 1031 * Operation type as string or NULL if op_type is invalid 1032 */ 1033 const char* 1034 rte_bbdev_op_type_str(enum rte_bbdev_op_type op_type); 1035 1036 /** 1037 * Creates a bbdev operation mempool 1038 * 1039 * @param name 1040 * Pool name. 1041 * @param type 1042 * Operation type, use RTE_BBDEV_OP_NONE for a pool which supports all 1043 * operation types. 1044 * @param num_elements 1045 * Number of elements in the pool. 1046 * @param cache_size 1047 * Number of elements to cache on an lcore, see rte_mempool_create() for 1048 * further details about cache size. 1049 * @param socket_id 1050 * Socket to allocate memory on. 1051 * 1052 * @return 1053 * - Pointer to a mempool on success, 1054 * - NULL pointer on failure. 1055 */ 1056 struct rte_mempool * 1057 rte_bbdev_op_pool_create(const char *name, enum rte_bbdev_op_type type, 1058 unsigned int num_elements, unsigned int cache_size, 1059 int socket_id); 1060 1061 /** 1062 * Bulk allocate encode operations from a mempool with parameter defaults reset. 1063 * 1064 * @param mempool 1065 * Operation mempool, created by rte_bbdev_op_pool_create(). 1066 * @param ops 1067 * Output array to place allocated operations 1068 * @param num_ops 1069 * Number of operations to allocate 1070 * 1071 * @returns 1072 * - 0 on success 1073 * - EINVAL if invalid mempool is provided 1074 */ 1075 static inline int 1076 rte_bbdev_enc_op_alloc_bulk(struct rte_mempool *mempool, 1077 struct rte_bbdev_enc_op **ops, unsigned int num_ops) 1078 { 1079 struct rte_bbdev_op_pool_private *priv; 1080 1081 /* Check type */ 1082 priv = (struct rte_bbdev_op_pool_private *) 1083 rte_mempool_get_priv(mempool); 1084 if (unlikely((priv->type != RTE_BBDEV_OP_TURBO_ENC) && 1085 (priv->type != RTE_BBDEV_OP_LDPC_ENC))) 1086 return -EINVAL; 1087 1088 /* Get elements */ 1089 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1090 } 1091 1092 /** 1093 * Bulk allocate decode operations from a mempool with parameter defaults reset. 1094 * 1095 * @param mempool 1096 * Operation mempool, created by rte_bbdev_op_pool_create(). 1097 * @param ops 1098 * Output array to place allocated operations 1099 * @param num_ops 1100 * Number of operations to allocate 1101 * 1102 * @returns 1103 * - 0 on success 1104 * - EINVAL if invalid mempool is provided 1105 */ 1106 static inline int 1107 rte_bbdev_dec_op_alloc_bulk(struct rte_mempool *mempool, 1108 struct rte_bbdev_dec_op **ops, unsigned int num_ops) 1109 { 1110 struct rte_bbdev_op_pool_private *priv; 1111 1112 /* Check type */ 1113 priv = (struct rte_bbdev_op_pool_private *) 1114 rte_mempool_get_priv(mempool); 1115 if (unlikely((priv->type != RTE_BBDEV_OP_TURBO_DEC) && 1116 (priv->type != RTE_BBDEV_OP_LDPC_DEC))) 1117 return -EINVAL; 1118 1119 /* Get elements */ 1120 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1121 } 1122 1123 /** 1124 * Bulk allocate FFT operations from a mempool with default parameters. 1125 * 1126 * @param mempool 1127 * Operation mempool, created by *rte_bbdev_op_pool_create*. 1128 * @param ops 1129 * Output array to place allocated operations. 1130 * @param num_ops 1131 * Number of operations to allocate. 1132 * 1133 * @returns 1134 * - 0 on success. 1135 * - EINVAL if invalid mempool is provided. 1136 */ 1137 static inline int 1138 rte_bbdev_fft_op_alloc_bulk(struct rte_mempool *mempool, 1139 struct rte_bbdev_fft_op **ops, unsigned int num_ops) 1140 { 1141 struct rte_bbdev_op_pool_private *priv; 1142 1143 /* Check type */ 1144 priv = (struct rte_bbdev_op_pool_private *)rte_mempool_get_priv(mempool); 1145 if (unlikely(priv->type != RTE_BBDEV_OP_FFT)) 1146 return -EINVAL; 1147 1148 /* Get elements */ 1149 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1150 } 1151 1152 /** 1153 * Bulk allocate MLD operations from a mempool with parameter defaults reset. 1154 * 1155 * @param mempool 1156 * Operation mempool, created by *rte_bbdev_op_pool_create*. 1157 * @param ops 1158 * Output array to place allocated operations. 1159 * @param num_ops 1160 * Number of operations to allocate. 1161 * 1162 * @returns 1163 * - 0 on success. 1164 * - EINVAL if invalid mempool is provided. 1165 */ 1166 static inline int 1167 rte_bbdev_mldts_op_alloc_bulk(struct rte_mempool *mempool, 1168 struct rte_bbdev_mldts_op **ops, uint16_t num_ops) 1169 { 1170 struct rte_bbdev_op_pool_private *priv; 1171 1172 /* Check type */ 1173 priv = (struct rte_bbdev_op_pool_private *)rte_mempool_get_priv(mempool); 1174 if (unlikely(priv->type != RTE_BBDEV_OP_MLDTS)) 1175 return -EINVAL; 1176 1177 /* Get elements */ 1178 return rte_mempool_get_bulk(mempool, (void **)ops, num_ops); 1179 } 1180 1181 /** 1182 * Free decode operation structures that were allocated by 1183 * rte_bbdev_dec_op_alloc_bulk(). 1184 * All structures must belong to the same mempool. 1185 * 1186 * @param ops 1187 * Operation structures 1188 * @param num_ops 1189 * Number of structures 1190 */ 1191 static inline void 1192 rte_bbdev_dec_op_free_bulk(struct rte_bbdev_dec_op **ops, unsigned int num_ops) 1193 { 1194 if (num_ops > 0) 1195 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1196 } 1197 1198 /** 1199 * Free encode operation structures that were allocated by 1200 * rte_bbdev_enc_op_alloc_bulk(). 1201 * All structures must belong to the same mempool. 1202 * 1203 * @param ops 1204 * Operation structures 1205 * @param num_ops 1206 * Number of structures 1207 */ 1208 static inline void 1209 rte_bbdev_enc_op_free_bulk(struct rte_bbdev_enc_op **ops, unsigned int num_ops) 1210 { 1211 if (num_ops > 0) 1212 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1213 } 1214 1215 /** 1216 * Free encode operation structures that were allocated by 1217 * *rte_bbdev_fft_op_alloc_bulk*. 1218 * All structures must belong to the same mempool. 1219 * 1220 * @param ops 1221 * Operation structures. 1222 * @param num_ops 1223 * Number of structures. 1224 */ 1225 static inline void 1226 rte_bbdev_fft_op_free_bulk(struct rte_bbdev_fft_op **ops, unsigned int num_ops) 1227 { 1228 if (num_ops > 0) 1229 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1230 } 1231 1232 /** 1233 * Free encode operation structures that were allocated by 1234 * rte_bbdev_mldts_op_alloc_bulk(). 1235 * All structures must belong to the same mempool. 1236 * 1237 * @param ops 1238 * Operation structures 1239 * @param num_ops 1240 * Number of structures 1241 */ 1242 static inline void 1243 rte_bbdev_mldts_op_free_bulk(struct rte_bbdev_mldts_op **ops, unsigned int num_ops) 1244 { 1245 if (num_ops > 0) 1246 rte_mempool_put_bulk(ops[0]->mempool, (void **)ops, num_ops); 1247 } 1248 1249 #ifdef __cplusplus 1250 } 1251 #endif 1252 1253 #endif /* _RTE_BBDEV_OP_H_ */ 1254