1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 1999 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 27 #ifndef _PCSER_MANUSPEC_H 28 #define _PCSER_MANUSPEC_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * This file describes any manufacturer-specific capabilities of the 38 * card. These capabilities are stored in an array of structures 39 * and are keyed off of the card's manufacturer and card IDs; these 40 * come from the CISTPL_MANFID tuple. 41 * We need this file since some cards have additional features that can 42 * not be specified in the CIS since there are not tuples to do so 43 * while other cards have a broken CIS which prevents them from 44 * being initialized properly. 45 */ 46 47 /* 48 * Property used to provide manufacturer-specific parameter overrides. 49 * This property is typically specified in a .conf file. 50 */ 51 #define PCSER_MODIFY_MANSPEC_PARAMS "pcser_modify_manspec_params" 52 53 #define PCSPP_DEBUG_PARSE_LINE 0x00000001 54 #define PCSPP_DEBUG_SET_MSP 0x00000002 55 #define PCSPP_DSPMATCH 0x00000004 56 #define PCSPP_DISPLAY 0x10000000 57 #define PCSPP_COMMENT 0x20000000 58 59 #define PCSER_PARSE_QUOTE '\'' 60 #define PCSER_PARSE_COMMENT '#' 61 #define PCSER_PARSE_ESCAPE '\\' 62 #define PCSER_PARSE_UNDERSCORE '_' 63 64 /* 65 * state defines for the valued variable state machine 66 */ 67 #define PT_STATE_UNKNOWN 0 68 #define PT_STATE_TOKEN 1 69 #define PT_STATE_STRING_VAR 2 70 #define PT_STATE_HEX_VAR 3 71 #define PT_STATE_DEC_VAR 4 72 #define PT_STATE_ESCAPE 5 73 74 /* 75 * Flags for pcser_manuspec_t.flags 76 * 77 * Matching flags 78 */ 79 #define PCSER_MATCH_MANUFACTURER 0x00000001 /* match manf ID */ 80 #define PCSER_MATCH_CARD 0x00000002 /* match card ID */ 81 #define PCSER_MATCH_VERS_1 0x00000004 /* match vers_1 */ 82 #define PCSER_MATCH_MASK 0x00000fff 83 84 /* 85 * Parameter override flags 86 */ 87 #define PCSER_MANSPEC_TXBUFSIZE 0x00001000 /* txbufsize valid */ 88 #define PCSER_MANSPEC_RXBUFSIZE 0x00002000 /* rxbufsize valid */ 89 #define PCSER_MANSPEC_FIFO_ENABLE 0x00004000 /* Tx/Rx FIFO valid */ 90 #define PCSER_MANSPEC_FIFO_DISABLE 0x00008000 /* Tx/Rx FIFO valid */ 91 #define PCSER_MANSPEC_AUTO_RTS 0x00010000 /* auto_rts valid */ 92 #define PCSER_MANSPEC_AUTO_CTS 0x00020000 /* auto_cts valid */ 93 #define PCSER_MANSPEC_READY_DELAY_1 0x00040000 /* delay before cfg */ 94 #define PCSER_MANSPEC_READY_DELAY_2 0x00080000 /* delay after cfg */ 95 #define PCSER_MANSPEC_CONFIG_INDEX 0x00100000 /* config index */ 96 #define PCSER_MANSPEC_CONFIG_ADDR 0x00200000 /* config address */ 97 #define PCSER_MANSPEC_CONFIG_PRESENT 0x00400000 /* regs present mask */ 98 #define PCSER_MANSPEC_NUM_IO_LINES 0x00800000 /* IO addr lines */ 99 #define PCSER_MANSPEC_NUM_IO_PORTS 0x01000000 /* num IO ports */ 100 #define PCSER_MANSPEC_IO_ADDR 0x02000000 /* IO address */ 101 #define PCSER_MANSPEC_CD_TIME 0x04000000 /* CD ignore time */ 102 #define PCSER_MANSPEC_IGN_CD_ON_OPEN 0x08000000 /* CD timer on open */ 103 104 typedef struct pcser_manuspec_parse_tree_t { 105 char *token; /* token to look for */ 106 int state; /* state machine state */ 107 unsigned flags; /* flags to set in manuspec struc */ 108 unsigned ctl; /* control flags */ 109 int fmt; /* data format type */ 110 void *var; /* pointer to manuspec struct var */ 111 } pcser_manuspec_parse_tree_t; 112 113 typedef struct pcser_manuspec_t { 114 uint32_t flags; /* matching flags */ 115 uint32_t manufacturer; /* manufacturer ID */ 116 uint32_t card; /* card ID */ 117 uint32_t txbufsize; /* Tx FIFO buffer size */ 118 uint32_t rxbufsize; /* Rx FIFO buffer size */ 119 uint32_t fifo_enable; /* Tx/Rx FIFO enable code */ 120 uint32_t fifo_disable; /* Tx/Rx FIFO disable code */ 121 uint32_t auto_rts; /* Auto RTS enable code */ 122 uint32_t auto_cts; /* Auto CTS enable code */ 123 uint32_t ready_delay_1; /* READY delay before config in mS */ 124 uint32_t ready_delay_2; /* READY delay after config in mS */ 125 uint32_t config_index; /* config index */ 126 uint32_t config_address; /* config regs address */ 127 uint32_t present; /* config regs present mask */ 128 uint32_t addr_lines; /* IO addr lines decoded */ 129 uint32_t length; /* length of IO range */ 130 uint32_t modem_base; /* base of UART registers */ 131 uint32_t CD_ignore_time; /* mS to ignore CD changes */ 132 char *vers_1; /* VERS_1 string */ 133 } pcser_manuspec_t; 134 135 pcser_manuspec_t pcser_manuspec[] = { 136 /* Sun/USRobotics Worldport modem */ 137 { (PCSER_MATCH_MANUFACTURER | /* matching flags */ 138 PCSER_MATCH_CARD | 139 PCSER_MANSPEC_TXBUFSIZE | 140 PCSER_MANSPEC_RXBUFSIZE | 141 PCSER_MANSPEC_FIFO_ENABLE | 142 PCSER_MANSPEC_FIFO_DISABLE | 143 PCSER_MANSPEC_AUTO_RTS), 144 0x0115, /* manufacturer ID */ 145 0x3330, /* card ID */ 146 64, /* Tx FIFO buffer size */ 147 64, /* Rx FIFO buffer size */ 148 0x0e1, /* Tx/Rx FIFO enable code */ 149 0, /* Tx/Rx FIFO disable code */ 150 0x010, /* Auto RTS enable code */ 151 0, /* Auto CTS enable code */ 152 0, /* READY_1 delay before config in mS */ 153 0, /* READY_2 delay after config in mS */ 154 0, /* config index */ 155 0, /* config regs address */ 156 0, /* config regs present mask */ 157 0, /* IO addr lines decoded */ 158 0, /* length of IO range */ 159 0, /* base of UART registers */ 160 0, /* mS to ignore CD changes */ 161 NULL /* VERS_1 string */ 162 }, 163 /* USRobotics Worldport modem with broken CIS */ 164 { (PCSER_MATCH_VERS_1 | /* matching flags */ 165 PCSER_MANSPEC_TXBUFSIZE | 166 PCSER_MANSPEC_RXBUFSIZE | 167 PCSER_MANSPEC_READY_DELAY_1), 168 0, /* manufacturer ID */ 169 0, /* card ID */ 170 1, /* Tx FIFO buffer size */ 171 1, /* Rx FIFO buffer size */ 172 0, /* Tx/Rx FIFO enable code */ 173 0, /* Tx/Rx FIFO disable code */ 174 0, /* Auto RTS enable code */ 175 0, /* Auto CTS enable code */ 176 10000, /* READY_1 delay before config in mS */ 177 0, /* READY_2 delay after config in mS */ 178 0, /* config index */ 179 0, /* config regs address */ 180 0, /* config regs present mask */ 181 0, /* IO addr lines decoded */ 182 0, /* length of IO range */ 183 0, /* base of UART registers */ 184 0, /* mS to ignore CD changes */ 185 "Intel MODEM 2400+ iNC110US A-0" /* VERS_1 string */ 186 }, 187 }; 188 189 #define PT_VAR_OFFSET(v) ((void *)&(((pcser_manuspec_t *)0)->v)) 190 /* 191 * The PT_VAR_* values specify what type of variable should be 192 * extracted from the token parameters. We know how to 193 * extract hex and decimal unsigned values and strings. 194 */ 195 #define PT_VAR_HEX 0x0001 196 #define PT_VAR_DEC 0x0002 197 #define PT_VAR_STRING 0x0003 198 #define PT_VAR_BOOL 0x0004 199 #define PT_VAR_HEX_CTL 0x0005 200 201 /* 202 * PT_VAR_BOOL has several sub-modes defined below 203 */ 204 #define PT_VAR_BOOL_NONE 0x0000 205 #define PT_VAR_BOOL_DISPLAY_ON 0x0001 206 #define PT_VAR_BOOL_DISPLAY_OFF 0x0002 207 #define PT_VAR_HEX_CTL_DEBUG 0x0003 208 #define PT_VAR_BOOL_DEBUG_STAT 0x0004 209 #define PT_VAR_BOOL_COMMENT_ON 0x0005 210 #define PT_VAR_BOOL_COMMENT_OFF 0x0006 211 #define PT_VAR_HEX_CTL_PCSER_DEBUG 0x0007 212 #define PT_VAR_BOOL_DSPMATCH_ON 0x0008 213 #define PT_VAR_BOOL_DSPMATCH_OFF 0x0009 214 #define PT_VAR_BOOL_CD_IGN 0x000a 215 216 /* 217 * Initialize the parse tree structure 218 */ 219 pcser_manuspec_parse_tree_t pcser_manuspec_parse_tree[] = { 220 221 { "flags", PT_STATE_HEX_VAR, 222 0, PT_VAR_BOOL_NONE, 223 PT_VAR_HEX, PT_VAR_OFFSET(flags) }, 224 { "manufacturer", PT_STATE_HEX_VAR, 225 PCSER_MATCH_MANUFACTURER, PT_VAR_BOOL_NONE, 226 PT_VAR_HEX, PT_VAR_OFFSET(manufacturer) }, 227 { "card", PT_STATE_HEX_VAR, 228 PCSER_MATCH_CARD, PT_VAR_BOOL_NONE, 229 PT_VAR_HEX, PT_VAR_OFFSET(card) }, 230 { "vers_1", PT_STATE_STRING_VAR, 231 PCSER_MATCH_VERS_1, PT_VAR_BOOL_NONE, 232 PT_VAR_STRING, PT_VAR_OFFSET(vers_1) }, 233 { "txbufsize", PT_STATE_HEX_VAR, 234 PCSER_MANSPEC_TXBUFSIZE, PT_VAR_BOOL_NONE, 235 PT_VAR_HEX, PT_VAR_OFFSET(txbufsize) }, 236 { "rxbufsize", PT_STATE_HEX_VAR, 237 PCSER_MANSPEC_RXBUFSIZE, PT_VAR_BOOL_NONE, 238 PT_VAR_HEX, PT_VAR_OFFSET(rxbufsize) }, 239 { "fifo_enable", PT_STATE_HEX_VAR, 240 PCSER_MANSPEC_FIFO_ENABLE, PT_VAR_BOOL_NONE, 241 PT_VAR_HEX, PT_VAR_OFFSET(fifo_enable) }, 242 { "fifo_disable", PT_STATE_HEX_VAR, 243 PCSER_MANSPEC_FIFO_DISABLE, PT_VAR_BOOL_NONE, 244 PT_VAR_HEX, PT_VAR_OFFSET(fifo_disable) }, 245 { "auto_rts", PT_STATE_HEX_VAR, 246 PCSER_MANSPEC_AUTO_RTS, PT_VAR_BOOL_NONE, 247 PT_VAR_HEX, PT_VAR_OFFSET(auto_rts) }, 248 { "auto_cts", PT_STATE_HEX_VAR, 249 PCSER_MANSPEC_AUTO_CTS, PT_VAR_BOOL_NONE, 250 PT_VAR_HEX, PT_VAR_OFFSET(auto_cts) }, 251 { "ready_delay_1", PT_STATE_DEC_VAR, 252 PCSER_MANSPEC_READY_DELAY_1, PT_VAR_BOOL_NONE, 253 PT_VAR_DEC, PT_VAR_OFFSET(ready_delay_1) }, 254 { "ready_delay_2", PT_STATE_DEC_VAR, 255 PCSER_MANSPEC_READY_DELAY_2, PT_VAR_BOOL_NONE, 256 PT_VAR_DEC, PT_VAR_OFFSET(ready_delay_2) }, 257 { "config_index", PT_STATE_HEX_VAR, 258 PCSER_MANSPEC_CONFIG_INDEX, PT_VAR_BOOL_NONE, 259 PT_VAR_HEX, PT_VAR_OFFSET(config_index) }, 260 { "config_address", PT_STATE_HEX_VAR, 261 PCSER_MANSPEC_CONFIG_ADDR, PT_VAR_BOOL_NONE, 262 PT_VAR_HEX, PT_VAR_OFFSET(config_address) }, 263 { "config_regs_present", PT_STATE_HEX_VAR, 264 PCSER_MANSPEC_CONFIG_PRESENT, PT_VAR_BOOL_NONE, 265 PT_VAR_HEX, PT_VAR_OFFSET(present) }, 266 { "IO_addr_lines", PT_STATE_HEX_VAR, 267 PCSER_MANSPEC_NUM_IO_LINES, PT_VAR_BOOL_NONE, 268 PT_VAR_HEX, PT_VAR_OFFSET(addr_lines) }, 269 { "IO_num_ports", PT_STATE_HEX_VAR, 270 PCSER_MANSPEC_NUM_IO_PORTS, PT_VAR_BOOL_NONE, 271 PT_VAR_HEX, PT_VAR_OFFSET(length) }, 272 { "IO_base_addr", PT_STATE_HEX_VAR, 273 PCSER_MANSPEC_IO_ADDR, PT_VAR_BOOL_NONE, 274 PT_VAR_HEX, PT_VAR_OFFSET(modem_base) }, 275 { "CD_ignore_time", PT_STATE_DEC_VAR, 276 PCSER_MANSPEC_CD_TIME, PT_VAR_BOOL_NONE, 277 PT_VAR_DEC, PT_VAR_OFFSET(CD_ignore_time) }, 278 { "ignore_CD_on_open", PT_STATE_TOKEN, 279 PCSER_MANSPEC_IGN_CD_ON_OPEN, PT_VAR_BOOL_CD_IGN, 280 PT_VAR_BOOL, 0 }, 281 { "display_on", PT_STATE_TOKEN, 282 0, PT_VAR_BOOL_DISPLAY_ON, 283 PT_VAR_BOOL, 0 }, 284 { "display_match_on", PT_STATE_TOKEN, 285 0, PT_VAR_BOOL_DSPMATCH_ON, 286 PT_VAR_BOOL, 0 }, 287 { "comment_on", PT_STATE_TOKEN, 288 0, PT_VAR_BOOL_COMMENT_ON, 289 PT_VAR_BOOL, 0 }, 290 { "display_off", PT_STATE_TOKEN, 291 0, PT_VAR_BOOL_DISPLAY_OFF, 292 PT_VAR_BOOL, 0 }, 293 { "display_match_off", PT_STATE_TOKEN, 294 0, PT_VAR_BOOL_DSPMATCH_OFF, 295 PT_VAR_BOOL, 0 }, 296 { "comment_off", PT_STATE_TOKEN, 297 0, PT_VAR_BOOL_COMMENT_OFF, 298 PT_VAR_BOOL, 0 }, 299 { "debug_stat", PT_STATE_TOKEN, 300 0, PT_VAR_BOOL_DEBUG_STAT, 301 PT_VAR_BOOL, 0 }, 302 { "debug", PT_STATE_HEX_VAR, 303 0, PT_VAR_HEX_CTL_DEBUG, 304 PT_VAR_HEX_CTL, 0 }, 305 { "pcser_debug", PT_STATE_HEX_VAR, 306 0, PT_VAR_HEX_CTL_PCSER_DEBUG, 307 PT_VAR_HEX_CTL, 0 }, 308 }; 309 310 #ifdef __cplusplus 311 } 312 #endif 313 314 #endif /* _PCSER_MANUSPEC_H */ 315