1 /* $NetBSD: pmu.h,v 1.2 2021/12/18 23:45:32 riastradh Exp $ */ 2 3 #ifndef __NVFW_PMU_H__ 4 #define __NVFW_PMU_H__ 5 6 struct nv_pmu_args { 7 u32 reserved; 8 u32 freq_hz; 9 u32 trace_size; 10 u32 trace_dma_base; 11 u16 trace_dma_base1; 12 u8 trace_dma_offset; 13 u32 trace_dma_idx; 14 bool secure_mode; 15 bool raise_priv_sec; 16 struct { 17 u32 dma_base; 18 u16 dma_base1; 19 u8 dma_offset; 20 u16 fb_size; 21 u8 dma_idx; 22 } gc6_ctx; 23 u8 pad; 24 }; 25 26 #define NV_PMU_UNIT_INIT 0x07 27 #define NV_PMU_UNIT_ACR 0x0a 28 29 struct nv_pmu_init_msg { 30 struct nv_falcon_msg hdr; 31 #define NV_PMU_INIT_MSG_INIT 0x00 32 u8 msg_type; 33 34 u8 pad; 35 u16 os_debug_entry_point; 36 37 struct { 38 u16 size; 39 u16 offset; 40 u8 index; 41 u8 pad; 42 } queue_info[5]; 43 44 u16 sw_managed_area_offset; 45 u16 sw_managed_area_size; 46 }; 47 48 struct nv_pmu_acr_cmd { 49 struct nv_falcon_cmd hdr; 50 #define NV_PMU_ACR_CMD_INIT_WPR_REGION 0x00 51 #define NV_PMU_ACR_CMD_BOOTSTRAP_FALCON 0x01 52 #define NV_PMU_ACR_CMD_BOOTSTRAP_MULTIPLE_FALCONS 0x03 53 u8 cmd_type; 54 }; 55 56 struct nv_pmu_acr_msg { 57 struct nv_falcon_cmd hdr; 58 u8 msg_type; 59 }; 60 61 struct nv_pmu_acr_init_wpr_region_cmd { 62 struct nv_pmu_acr_cmd cmd; 63 u32 region_id; 64 u32 wpr_offset; 65 }; 66 67 struct nv_pmu_acr_init_wpr_region_msg { 68 struct nv_pmu_acr_msg msg; 69 u32 error_code; 70 }; 71 72 struct nv_pmu_acr_bootstrap_falcon_cmd { 73 struct nv_pmu_acr_cmd cmd; 74 #define NV_PMU_ACR_BOOTSTRAP_FALCON_FLAGS_RESET_YES 0x00000000 75 #define NV_PMU_ACR_BOOTSTRAP_FALCON_FLAGS_RESET_NO 0x00000001 76 u32 flags; 77 u32 falcon_id; 78 }; 79 80 struct nv_pmu_acr_bootstrap_falcon_msg { 81 struct nv_pmu_acr_msg msg; 82 u32 falcon_id; 83 }; 84 85 struct nv_pmu_acr_bootstrap_multiple_falcons_cmd { 86 struct nv_pmu_acr_cmd cmd; 87 #define NV_PMU_ACR_BOOTSTRAP_MULTIPLE_FALCONS_FLAGS_RESET_YES 0x00000000 88 #define NV_PMU_ACR_BOOTSTRAP_MULTIPLE_FALCONS_FLAGS_RESET_NO 0x00000001 89 u32 flags; 90 u32 falcon_mask; 91 u32 use_va_mask; 92 u32 wpr_lo; 93 u32 wpr_hi; 94 }; 95 96 struct nv_pmu_acr_bootstrap_multiple_falcons_msg { 97 struct nv_pmu_acr_msg msg; 98 u32 falcon_mask; 99 }; 100 #endif 101