1 /* $NetBSD: nouveau_nvkm_subdev_fb_sddr2.c,v 1.4 2021/12/18 23:45:39 riastradh Exp $ */
2
3 /*
4 * Copyright 2014 Roy Spliet
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Roy Spliet <rspliet@eclipso.eu>
25 * Ben Skeggs
26 */
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_fb_sddr2.c,v 1.4 2021/12/18 23:45:39 riastradh Exp $");
29
30 #include "ram.h"
31 #include "priv.h"
32 #include "ram.h"
33
34 struct ramxlat {
35 int id;
36 u8 enc;
37 };
38
39 static inline int
ramxlat(const struct ramxlat * xlat,int id)40 ramxlat(const struct ramxlat *xlat, int id)
41 {
42 while (xlat->id >= 0) {
43 if (xlat->id == id)
44 return xlat->enc;
45 xlat++;
46 }
47 return -EINVAL;
48 }
49
50 static const struct ramxlat
51 ramddr2_cl[] = {
52 { 2, 2 }, { 3, 3 }, { 4, 4 }, { 5, 5 }, { 6, 6 },
53 /* The following are available in some, but not all DDR2 docs */
54 { 7, 7 },
55 { -1 }
56 };
57
58 static const struct ramxlat
59 ramddr2_wr[] = {
60 { 2, 1 }, { 3, 2 }, { 4, 3 }, { 5, 4 }, { 6, 5 },
61 /* The following are available in some, but not all DDR2 docs */
62 { 7, 6 },
63 { -1 }
64 };
65
66 int
nvkm_sddr2_calc(struct nvkm_ram * ram)67 nvkm_sddr2_calc(struct nvkm_ram *ram)
68 {
69 int CL, WR, DLL = 0, ODT = 0;
70
71 switch (ram->next->bios.timing_ver) {
72 case 0x10:
73 CL = ram->next->bios.timing_10_CL;
74 WR = ram->next->bios.timing_10_WR;
75 DLL = !ram->next->bios.ramcfg_DLLoff;
76 ODT = ram->next->bios.timing_10_ODT & 3;
77 break;
78 case 0x20:
79 CL = (ram->next->bios.timing[1] & 0x0000001f);
80 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
81 break;
82 default:
83 return -ENOSYS;
84 }
85
86 if (ram->next->bios.timing_ver == 0x20 ||
87 ram->next->bios.ramcfg_timing == 0xff) {
88 ODT = (ram->mr[1] & 0x004) >> 2 |
89 (ram->mr[1] & 0x040) >> 5;
90 }
91
92 CL = ramxlat(ramddr2_cl, CL);
93 WR = ramxlat(ramddr2_wr, WR);
94 if (CL < 0 || WR < 0)
95 return -EINVAL;
96
97 ram->mr[0] &= ~0xf70;
98 ram->mr[0] |= (WR & 0x07) << 9;
99 ram->mr[0] |= (CL & 0x07) << 4;
100
101 ram->mr[1] &= ~0x045;
102 ram->mr[1] |= (ODT & 0x1) << 2;
103 ram->mr[1] |= (ODT & 0x2) << 5;
104 ram->mr[1] |= !DLL;
105 return 0;
106 }
107