1 /* $NetBSD: nouveau_nvkm_engine_gr_gp104.c,v 1.2 2021/12/18 23:45:36 riastradh Exp $ */
2
3 /*
4 * Copyright 2018 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_gr_gp104.c,v 1.2 2021/12/18 23:45:36 riastradh Exp $");
26
27 #include "gf100.h"
28 #include "ctxgf100.h"
29
30 #include <nvif/class.h>
31
32 static const struct gf100_gr_func
33 gp104_gr = {
34 .oneinit_tiles = gm200_gr_oneinit_tiles,
35 .oneinit_sm_id = gm200_gr_oneinit_sm_id,
36 .init = gf100_gr_init,
37 .init_gpc_mmu = gm200_gr_init_gpc_mmu,
38 .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
39 .init_zcull = gf117_gr_init_zcull,
40 .init_num_active_ltcs = gm200_gr_init_num_active_ltcs,
41 .init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
42 .init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask,
43 .init_fecs_exceptions = gp100_gr_init_fecs_exceptions,
44 .init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
45 .init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
46 .init_419cc0 = gf100_gr_init_419cc0,
47 .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
48 .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
49 .init_504430 = gm107_gr_init_504430,
50 .init_shader_exceptions = gp100_gr_init_shader_exceptions,
51 .trap_mp = gf100_gr_trap_mp,
52 .rops = gm200_gr_rops,
53 .gpc_nr = 6,
54 .tpc_nr = 5,
55 .ppc_nr = 3,
56 .grctx = &gp104_grctx,
57 .zbc = &gp102_gr_zbc,
58 .sclass = {
59 { -1, -1, FERMI_TWOD_A },
60 { -1, -1, KEPLER_INLINE_TO_MEMORY_B },
61 { -1, -1, PASCAL_B, &gf100_fermi },
62 { -1, -1, PASCAL_COMPUTE_B },
63 {}
64 }
65 };
66
67 MODULE_FIRMWARE("nvidia/gp104/gr/fecs_bl.bin");
68 MODULE_FIRMWARE("nvidia/gp104/gr/fecs_inst.bin");
69 MODULE_FIRMWARE("nvidia/gp104/gr/fecs_data.bin");
70 MODULE_FIRMWARE("nvidia/gp104/gr/fecs_sig.bin");
71 MODULE_FIRMWARE("nvidia/gp104/gr/gpccs_bl.bin");
72 MODULE_FIRMWARE("nvidia/gp104/gr/gpccs_inst.bin");
73 MODULE_FIRMWARE("nvidia/gp104/gr/gpccs_data.bin");
74 MODULE_FIRMWARE("nvidia/gp104/gr/gpccs_sig.bin");
75 MODULE_FIRMWARE("nvidia/gp104/gr/sw_ctx.bin");
76 MODULE_FIRMWARE("nvidia/gp104/gr/sw_nonctx.bin");
77 MODULE_FIRMWARE("nvidia/gp104/gr/sw_bundle_init.bin");
78 MODULE_FIRMWARE("nvidia/gp104/gr/sw_method_init.bin");
79
80 MODULE_FIRMWARE("nvidia/gp106/gr/fecs_bl.bin");
81 MODULE_FIRMWARE("nvidia/gp106/gr/fecs_inst.bin");
82 MODULE_FIRMWARE("nvidia/gp106/gr/fecs_data.bin");
83 MODULE_FIRMWARE("nvidia/gp106/gr/fecs_sig.bin");
84 MODULE_FIRMWARE("nvidia/gp106/gr/gpccs_bl.bin");
85 MODULE_FIRMWARE("nvidia/gp106/gr/gpccs_inst.bin");
86 MODULE_FIRMWARE("nvidia/gp106/gr/gpccs_data.bin");
87 MODULE_FIRMWARE("nvidia/gp106/gr/gpccs_sig.bin");
88 MODULE_FIRMWARE("nvidia/gp106/gr/sw_ctx.bin");
89 MODULE_FIRMWARE("nvidia/gp106/gr/sw_nonctx.bin");
90 MODULE_FIRMWARE("nvidia/gp106/gr/sw_bundle_init.bin");
91 MODULE_FIRMWARE("nvidia/gp106/gr/sw_method_init.bin");
92
93 static const struct gf100_gr_fwif
94 gp104_gr_fwif[] = {
95 { 0, gm200_gr_load, &gp104_gr, &gm200_gr_fecs_acr, &gm200_gr_gpccs_acr },
96 {}
97 };
98
99 int
gp104_gr_new(struct nvkm_device * device,int index,struct nvkm_gr ** pgr)100 gp104_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
101 {
102 return gf100_gr_new_(gp104_gr_fwif, device, index, pgr);
103 }
104