1 /* $NetBSD: netwalker_machdep.c,v 1.28 2024/06/02 12:11:36 andvar Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation.
5 * All rights reserved.
6 * Written by Hiroyuki Bessho for Genetec Corporation.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Machine dependent functions for kernel setup for Sharp Netwalker.
30 * Based on iq80310_machhdep.c
31 */
32 /*
33 * Copyright (c) 2001 Wasabi Systems, Inc.
34 * All rights reserved.
35 *
36 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. All advertising materials mentioning features or use of this software
47 * must display the following acknowledgement:
48 * This product includes software developed for the NetBSD Project by
49 * Wasabi Systems, Inc.
50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
51 * or promote products derived from this software without specific prior
52 * written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64 * POSSIBILITY OF SUCH DAMAGE.
65 */
66
67 /*
68 * Copyright (c) 1997,1998 Mark Brinicombe.
69 * Copyright (c) 1997,1998 Causality Limited.
70 * All rights reserved.
71 *
72 * Redistribution and use in source and binary forms, with or without
73 * modification, are permitted provided that the following conditions
74 * are met:
75 * 1. Redistributions of source code must retain the above copyright
76 * notice, this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce the above copyright
78 * notice, this list of conditions and the following disclaimer in the
79 * documentation and/or other materials provided with the distribution.
80 * 3. All advertising materials mentioning features or use of this software
81 * must display the following acknowledgement:
82 * This product includes software developed by Mark Brinicombe
83 * for the NetBSD Project.
84 * 4. The name of the company nor the name of the author may be used to
85 * endorse or promote products derived from this software without specific
86 * prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 * SUCH DAMAGE.
99 *
100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
101 * boards using RedBoot firmware.
102 */
103
104 #include <sys/cdefs.h>
105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.28 2024/06/02 12:11:36 andvar Exp $");
106
107 #include "opt_evbarm_boardtype.h"
108 #include "opt_arm_debug.h"
109 #include "opt_console.h"
110 #include "opt_cputypes.h"
111 #include "opt_ddb.h"
112 #include "opt_kgdb.h"
113 #include "opt_md.h"
114 #include "opt_com.h"
115 #include "imxuart.h"
116 #include "opt_imxuart.h"
117 #include "opt_imx.h"
118 #include "opt_imx51_ipuv3.h"
119 #include "opt_machdep.h"
120
121 #include <sys/param.h>
122 #include <sys/device.h>
123 #include <sys/reboot.h>
124 #include <sys/termios.h>
125 #include <sys/bus.h>
126
127 #include "genfb.h"
128 #include "netwalker_backlight.h"
129 #include "netwalker_backlightvar.h"
130
131 #include <machine/db_machdep.h>
132 #ifdef KGDB
133 #include <sys/kgdb.h>
134 #endif
135
136 #include <machine/bootconfig.h>
137 #include <machine/autoconf.h>
138
139 #include <arm/arm32/machdep.h>
140
141 #include <arm/imx/imx51reg.h>
142 #include <arm/imx/imx51var.h>
143 #include <arm/imx/imxgpioreg.h>
144 #include <arm/imx/imxwdogreg.h>
145 #include <arm/imx/imxuartreg.h>
146 #include <arm/imx/imxuartvar.h>
147 #include <arm/imx/imx51_iomuxreg.h>
148
149 #include <evbarm/netwalker/netwalker_reg.h>
150 #include <evbarm/netwalker/netwalker.h>
151
152 #include "ukbd.h"
153 #if (NUKBD > 0)
154 #include <dev/usb/ukbdvar.h>
155 #endif
156
157 /* Kernel text starts 1MB in from the bottom of the kernel address space. */
158 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000)
159
160 BootConfig bootconfig; /* Boot config storage */
161 static char bootargs[MAX_BOOT_STRING] = BOOT_ARGS;
162 char *boot_args = NULL;
163
164 extern char KERNEL_BASE_phys[];
165
166 u_int uboot_args[4] __attribute__((__section__(".data")));
167
168 extern int cpu_do_powersave;
169
170 /*
171 * Macros to translate between physical and virtual for a subset of the
172 * kernel address space. *Not* for general use.
173 */
174 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
175
176
177 /* Prototypes */
178
179 void consinit(void);
180
181 #ifdef KGDB
182 void kgdb_port_init(void);
183 #endif
184
185 static void init_clocks(void);
186 static void setup_ioports(void);
187
188 static void netwalker_device_register(device_t, void *);
189
190 #ifndef CONSPEED
191 #define CONSPEED B115200 /* What RedBoot uses */
192 #endif
193 #ifndef CONMODE
194 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
195 #endif
196
197 int comcnspeed = CONSPEED;
198 int comcnmode = CONMODE;
199
200 /*
201 * Static device mappings. These peripheral registers are mapped at
202 * fixed virtual addresses very early in netwalker_start() so that we
203 * can use them while booting the kernel, and stay at the same address
204 * throughout whole kernel's life time.
205 *
206 * We use this table twice; once with bootstrap page table, and once
207 * with kernel's page table which we build up in initarm().
208 */
209
210 static const struct pmap_devmap netwalker_devmap[] = {
211 DEVMAP_ENTRY(
212 /* for UART1, IOMUXC */
213 NETWALKER_IO_VBASE0,
214 NETWALKER_IO_PBASE0,
215 L1_S_SIZE * 4
216 ),
217 DEVMAP_ENTRY_END
218 };
219
220 #ifndef MEMSTART
221 #define MEMSTART 0x90000000
222 #endif
223 #ifndef MEMSIZE
224 #define MEMSIZE 512
225 #endif
226
227 /*
228 * vaddr_t initarm(...)
229 *
230 * Initial entry point on startup. This gets called before main() is
231 * entered.
232 * It should be responsible for setting up everything that must be
233 * in place when main is called.
234 * This includes
235 * Taking a copy of the boot configuration structure.
236 * Initialising the physical console so characters can be printed.
237 * Setting up page tables for the kernel
238 * Relocating the kernel to the bottom of physical memory
239 */
240 vaddr_t
initarm(void * arg)241 initarm(void *arg)
242 {
243 /*
244 * Heads up ... Setup the CPU / MMU / TLB functions
245 */
246 if (set_cpufuncs())
247 panic("cpu not recognized!");
248
249 /* map some peripheral registers */
250 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE,
251 netwalker_devmap);
252
253 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
254
255 setup_ioports();
256
257 consinit();
258
259 #ifdef NO_POWERSAVE
260 cpu_do_powersave=0;
261 #endif
262
263 init_clocks();
264
265 #ifdef KGDB
266 kgdb_port_init();
267 #endif
268
269 /* Talk to the user */
270 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
271
272 #ifdef BOOT_ARGS
273 char mi_bootargs[] = BOOT_ARGS;
274 parse_mi_bootargs(mi_bootargs);
275 #endif
276
277 #if defined(VERBOSE_INIT_ARM) || 1
278 printf("initarm: Configuring system");
279 printf(", CLIDR=%010o CTR=%#x",
280 armreg_clidr_read(), armreg_ctr_read());
281 printf("\n");
282 #endif
283 /*
284 * Ok we have the following memory map
285 *
286 * Physical Address Range Description
287 * ----------------------- ----------------------------------
288 *
289 * 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte)
290 *
291 * The initarm() has the responsibility for creating the kernel
292 * page tables.
293 * It must also set up various memory pointers that are used
294 * by pmap etc.
295 */
296
297 #ifdef VERBOSE_INIT_ARM
298 printf("initarm: Configuring system ...\n");
299 #endif
300 /* Fake bootconfig structure for the benefit of pmap.c */
301 /* XXX must make the memory description h/w independent */
302 bootconfig.dramblocks = 1;
303 bootconfig.dram[0].address = MEMSTART;
304 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE;
305
306 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE;
307
308 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
309 if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
310 printf("%s: dropping RAM size from %luMB to %uMB\n",
311 __func__, (unsigned long) (ram_size >> 20),
312 (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
313 ram_size = KERNEL_VM_BASE - KERNEL_BASE;
314 }
315 #endif
316
317 arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
318 KERNEL_BASE_PHYS);
319
320 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
321 const bool mapallmem_p = true;
322 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
323 #else
324 const bool mapallmem_p = false;
325 #endif
326
327 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0,
328 netwalker_devmap, mapallmem_p);
329
330 /* disable power down counter in watch dog,
331 This must be done within 16 seconds of start-up. */
332 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0);
333
334 #ifdef BOOTHOWTO
335 boothowto |= BOOTHOWTO;
336 #endif
337
338 boot_args = bootargs;
339 parse_mi_bootargs(boot_args);
340 printf("boot_args : %s\n", boot_args);
341
342 /* we've a specific device_register routine */
343 evbarm_device_register = netwalker_device_register;
344
345 #ifdef VERBOSE_INIT_ARM
346 printf("initarm done.\n");
347 #endif
348 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
349 }
350
351
352 static void
init_clocks(void)353 init_clocks(void)
354 {
355 cortex_pmc_ccnt_init();
356 }
357
358 struct iomux_setup {
359 /* iomux registers are 32-bit wide, but upper 16 bits are not
360 * used. */
361 uint16_t reg;
362 uint16_t val;
363 };
364
365 #define IOMUX_M(padname, mux) \
366 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux)
367
368 #define IOMUX_P(padname, pad) \
369 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad)
370
371 #define IOMUX_MP(padname, mux, pad) \
372 IOMUX_M(padname, mux), \
373 IOMUX_P(padname, pad)
374
375
376 #define IOMUX_DATA(offset, value) \
377 { \
378 .reg = (offset), \
379 .val = (value), \
380 }
381
382
383 /*
384 * set same values to IOMUX registers as linux kernel does
385 */
386 const struct iomux_setup iomux_setup_data[] = {
387 #define HYS PAD_CTL_HYS
388 #define ODE PAD_CTL_ODE
389 #define DSEHIGH PAD_CTL_DSE_HIGH
390 #define DSEMID PAD_CTL_DSE_MID
391 #define DSELOW PAD_CTL_DSE_LOW
392 #define DSEMAX PAD_CTL_DSE_MAX
393 #define SRE PAD_CTL_SRE
394 #define KEEPER PAD_CTL_KEEPER
395 #define PULL PAD_CTL_PULL
396 #define PU_22K PAD_CTL_PUS_22K_PU
397 #define PU_47K PAD_CTL_PUS_47K_PU
398 #define PU_100K PAD_CTL_PUS_100K_PU
399 #define PD_100K PAD_CTL_PUS_100K_PD
400 #define HVE PAD_CTL_HVE /* Low output voltage */
401
402 #define ALT0 IOMUX_CONFIG_ALT0
403 #define ALT1 IOMUX_CONFIG_ALT1
404 #define ALT2 IOMUX_CONFIG_ALT2
405 #define ALT3 IOMUX_CONFIG_ALT3
406 #define ALT4 IOMUX_CONFIG_ALT4
407 #define ALT5 IOMUX_CONFIG_ALT5
408 #define ALT6 IOMUX_CONFIG_ALT6
409 #define ALT7 IOMUX_CONFIG_ALT7
410 #define SION IOMUX_CONFIG_SION
411
412 /* left button */
413 IOMUX_MP(EIM_EB2, ALT1, HYS),
414 /* right button */
415 IOMUX_MP(EIM_EB3, ALT1, HYS),
416
417 /* UART1 */
418 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
419 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
420 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH),
421 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH),
422
423 /* LCD Display */
424 IOMUX_M(DI1_PIN2, ALT0),
425 IOMUX_M(DI1_PIN3, ALT0),
426
427 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE),
428 #if 0
429 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL),
430 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL),
431 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL),
432 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL),
433 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL),
434 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL),
435 #endif
436 IOMUX_M(DISP1_DAT6, ALT0),
437 IOMUX_M(DISP1_DAT7, ALT0),
438 IOMUX_M(DISP1_DAT8, ALT0),
439 IOMUX_M(DISP1_DAT9, ALT0),
440 IOMUX_M(DISP1_DAT10, ALT0),
441 IOMUX_M(DISP1_DAT11, ALT0),
442 IOMUX_M(DISP1_DAT12, ALT0),
443 IOMUX_M(DISP1_DAT13, ALT0),
444 IOMUX_M(DISP1_DAT14, ALT0),
445 IOMUX_M(DISP1_DAT15, ALT0),
446 IOMUX_M(DISP1_DAT16, ALT0),
447 IOMUX_M(DISP1_DAT17, ALT0),
448 IOMUX_M(DISP1_DAT18, ALT0),
449 IOMUX_M(DISP1_DAT19, ALT0),
450 IOMUX_M(DISP1_DAT20, ALT0),
451 IOMUX_M(DISP1_DAT21, ALT0),
452 IOMUX_M(DISP1_DAT22, ALT0),
453 IOMUX_M(DISP1_DAT23, ALT0),
454
455 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */
456 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0),
457 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */
458 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE),
459 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */
460
461 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */
462
463 /* XXX VGA pins */
464 IOMUX_M(DI_GP4, ALT4),
465 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K),
466
467 /* I2C1 */
468 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), /* SDA */
469 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */
470 IOMUX_DATA(IOMUXC_I2C1_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_0),
471 IOMUX_DATA(IOMUXC_I2C1_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_0),
472
473 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */
474
475 /* BT */
476 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */
477 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */
478 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */
479
480 /* UART3 */
481 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE),
482 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */
483 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */
484 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */
485 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */
486 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */
487 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3),
488
489 /* OJ6SH-T25 */
490 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */
491 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */
492 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */
493
494 /* audio pins */
495 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE),
496 /* XXX: linux code:
497 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
498 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE |
499 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */
500
501 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE),
502 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE),
503 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE),
504
505 /* headphone detect */
506 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K),
507 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH),
508 /* XXX more audio pins ? */
509
510 /* CSPI */
511 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
512 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
513 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE),
514
515 /* SPI CS */
516 IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */
517 IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */
518 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */
519
520 /* 26M Osc */
521 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */
522
523 /* I2C2 */
524 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), /* SDA */
525 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), /* SCL */
526 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1),
527 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1),
528
529 /* NAND */
530 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
531 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
532 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER),
533 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER),
534 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K),
535 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K),
536 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K),
537 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
538 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
539 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
540 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
541 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
542 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
543 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
544 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
545
546 /* Battery pins */
547 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH),
548 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH),
549 #if 0
550 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH),
551 #endif
552 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH),
553
554 /* SD1 */
555 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE),
556 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH),
557 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE),
558 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE),
559 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE),
560 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE),
561 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K),
562
563 /* SD2 */
564 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE),
565 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE),
566 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE),
567 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE),
568 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE),
569 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE),
570
571 /* USB */
572 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE),
573 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE),
574 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE),
575 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE),
576 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE),
577 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE),
578 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE),
579 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE),
580 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE),
581 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE),
582 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE),
583 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE),
584 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE),
585 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE),
586 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */
587
588 #undef ODE
589 #undef HYS
590 #undef SRE
591 #undef PULL
592 #undef KEEPER
593 #undef PU_22K
594 #undef PU_47K
595 #undef PU_100K
596 #undef PD_100K
597 #undef HVE
598 #undef DSEMAX
599 #undef DSEHIGH
600 #undef DSEMID
601 #undef DSELOW
602
603 #undef ALT0
604 #undef ALT1
605 #undef ALT2
606 #undef ALT3
607 #undef ALT4
608 #undef ALT5
609 #undef ALT6
610 #undef ALT7
611 #undef SION
612 };
613
614 static void
setup_ioports(void)615 setup_ioports(void)
616 {
617 int i;
618 const struct iomux_setup *p;
619
620 /* Initialize all IOMUX registers */
621 for (i=0; i < __arraycount(iomux_setup_data); ++i) {
622 p = iomux_setup_data + i;
623
624 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg,
625 p->val);
626 }
627 }
628
629
630 #ifdef CONSDEVNAME
631 const char consdevname[] = CONSDEVNAME;
632
633 #ifndef CONMODE
634 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
635 #endif
636 #ifndef CONSPEED
637 #define CONSPEED 115200
638 #endif
639
640 int consmode = CONMODE;
641 int consrate = CONSPEED;
642
643 #endif /* CONSDEVNAME */
644
645 #ifndef IMXUART_FREQ
646 #define IMXUART_FREQ 66500000
647 #endif
648
649 void
consinit(void)650 consinit(void)
651 {
652 static int consinit_called = 0;
653
654 if (consinit_called)
655 return;
656
657 consinit_called = 1;
658
659 #ifdef CONSDEVNAME
660
661 #if NIMXUART > 0
662 imxuart_set_frequency(IMXUART_FREQ, 2);
663 #endif
664
665 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE)
666 if (strcmp(consdevname, "imxuart") == 0) {
667 paddr_t consaddr;
668 #ifdef CONADDR
669 consaddr = CONADDR;
670 #else
671 consaddr = IMX51_UART1_BASE;
672 #endif
673 imxuart_cnattach(&armv7_generic_bs_tag, consaddr, consrate, consmode);
674 return;
675 }
676 #endif
677 #endif
678 }
679
680 static void
netwalker_device_register(device_t self,void * aux)681 netwalker_device_register(device_t self, void *aux)
682 {
683 prop_dictionary_t dict = device_properties(self);
684
685 #if NGENFB > 0
686 if (device_is_a(self, "genfb")) {
687 char *ptr;
688 if (get_bootconf_option(boot_args, "console",
689 BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
690 prop_dictionary_set_bool(dict, "is_console", true);
691 #if NUKBD > 0
692 ukbd_cnattach();
693 #endif
694 } else {
695 prop_dictionary_set_bool(dict, "is_console", false);
696 }
697 #if NNETWALKER_BACKLIGHT > 0
698 netwalker_backlight_genfb_parameter_set(dict);
699 #endif
700 }
701 #endif
702 }
703
704 #ifdef KGDB
705 #ifndef KGDB_DEVNAME
706 #define KGDB_DEVNAME "imxuart"
707 #endif
708 #ifndef KGDB_DEVMODE
709 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
710 #endif
711
712 const char kgdb_devname[20] = KGDB_DEVNAME;
713 int kgdb_mode = KGDB_DEVMODE;
714 int kgdb_addr = KGDB_DEVADDR;
715 extern int kgdb_rate; /* defined in kgdb_stub.c */
716
717 void
kgdb_port_init(void)718 kgdb_port_init(void)
719 {
720 #if (NIMXUART > 0)
721 if (strcmp(kgdb_devname, "imxuart") == 0) {
722 imxuart_kgdb_attach(&armv7_generic_bs_tag, kgdb_addr,
723 kgdb_rate, kgdb_mode);
724 return;
725 }
726
727 #endif
728 }
729 #endif
730
731
732