1dnl ARM Neon mpn_com optimised for A15. 2 3dnl Copyright 2013 Free Software Foundation, Inc. 4 5dnl This file is part of the GNU MP Library. 6dnl 7dnl The GNU MP Library is free software; you can redistribute it and/or modify 8dnl it under the terms of either: 9dnl 10dnl * the GNU Lesser General Public License as published by the Free 11dnl Software Foundation; either version 3 of the License, or (at your 12dnl option) any later version. 13dnl 14dnl or 15dnl 16dnl * the GNU General Public License as published by the Free Software 17dnl Foundation; either version 2 of the License, or (at your option) any 18dnl later version. 19dnl 20dnl or both in parallel, as here. 21dnl 22dnl The GNU MP Library is distributed in the hope that it will be useful, but 23dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 24dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25dnl for more details. 26dnl 27dnl You should have received copies of the GNU General Public License and the 28dnl GNU Lesser General Public License along with the GNU MP Library. If not, 29dnl see https://www.gnu.org/licenses/. 30 31include(`../config.m4') 32 33C cycles/limb 34C StrongARM ? 35C XScale ? 36C Cortex-A8 ? 37C Cortex-A9 2.1 38C Cortex-A15 0.65 39 40define(`rp', `r0') 41define(`up', `r1') 42define(`n', `r2') 43 44ASM_START() 45PROLOGUE(mpn_com) 46 cmp n, #7 47 ble L(bc) 48 49C Perform a few initial operation until rp is 128-bit aligned 50 tst rp, #4 51 beq L(al1) 52 vld1.32 {d0[0]}, [up]! 53 sub n, n, #1 54 vmvn d0, d0 55 vst1.32 {d0[0]}, [rp]! 56L(al1): tst rp, #8 57 beq L(al2) 58 vld1.32 {d0}, [up]! 59 sub n, n, #2 60 vmvn d0, d0 61 vst1.32 {d0}, [rp:64]! 62L(al2): vld1.32 {q2}, [up]! 63 subs n, n, #12 64 blt L(end) 65 66 ALIGN(16) 67L(top): vld1.32 {q0}, [up]! 68 vmvn q2, q2 69 subs n, n, #8 70 vst1.32 {q2}, [rp:128]! 71 vld1.32 {q2}, [up]! 72 vmvn q0, q0 73 vst1.32 {q0}, [rp:128]! 74 bge L(top) 75 76L(end): vmvn q2, q2 77 vst1.32 {q2}, [rp:128]! 78 79C Handle last 0-7 limbs. Note that rp is aligned after loop, but not when we 80C arrive here via L(bc) 81L(bc): tst n, #4 82 beq L(tl1) 83 vld1.32 {q0}, [up]! 84 vmvn q0, q0 85 vst1.32 {q0}, [rp]! 86L(tl1): tst n, #2 87 beq L(tl2) 88 vld1.32 {d0}, [up]! 89 vmvn d0, d0 90 vst1.32 {d0}, [rp]! 91L(tl2): tst n, #1 92 beq L(tl3) 93 vld1.32 {d0[0]}, [up] 94 vmvn d0, d0 95 vst1.32 {d0[0]}, [rp] 96L(tl3): bx lr 97EPILOGUE() 98