1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2022 NVIDIA Corporation & Affiliates 3 */ 4 5 #ifndef MLX5DR_RULE_H_ 6 #define MLX5DR_RULE_H_ 7 8 enum { 9 MLX5DR_STE_CTRL_SZ = 20, 10 MLX5DR_ACTIONS_SZ = 12, 11 MLX5DR_MATCH_TAG_SZ = 32, 12 MLX5DR_JUMBO_TAG_SZ = 44, 13 }; 14 15 enum mlx5dr_rule_status { 16 MLX5DR_RULE_STATUS_UNKNOWN, 17 MLX5DR_RULE_STATUS_CREATING, 18 MLX5DR_RULE_STATUS_CREATED, 19 MLX5DR_RULE_STATUS_DELETING, 20 MLX5DR_RULE_STATUS_DELETED, 21 MLX5DR_RULE_STATUS_FAILING, 22 MLX5DR_RULE_STATUS_FAILED, 23 }; 24 25 enum mlx5dr_rule_move_state { 26 MLX5DR_RULE_RESIZE_STATE_IDLE, 27 MLX5DR_RULE_RESIZE_STATE_WRITING, 28 MLX5DR_RULE_RESIZE_STATE_DELETING, 29 }; 30 31 struct mlx5dr_rule_match_tag { 32 union { 33 uint8_t jumbo[MLX5DR_JUMBO_TAG_SZ]; 34 struct { 35 uint8_t reserved[MLX5DR_ACTIONS_SZ]; 36 uint8_t match[MLX5DR_MATCH_TAG_SZ]; 37 }; 38 }; 39 }; 40 41 struct mlx5dr_rule_resize_info { 42 struct mlx5dr_pool *action_ste_pool; 43 uint32_t rtc_0; 44 uint32_t rtc_1; 45 uint32_t rule_idx; 46 uint8_t state; 47 uint8_t max_stes; 48 uint8_t ctrl_seg[MLX5DR_WQE_SZ_GTA_CTRL]; /* Ctrl segment of STE: 48 bytes */ 49 uint8_t data_seg[MLX5DR_WQE_SZ_GTA_DATA]; /* Data segment of STE: 64 bytes */ 50 }; 51 52 struct mlx5dr_rule { 53 struct mlx5dr_matcher *matcher; 54 union { 55 struct mlx5dr_rule_match_tag tag; 56 /* Pointer to tag to store more than one tag */ 57 struct mlx5dr_rule_match_tag *tag_ptr; 58 struct ibv_flow *flow; 59 struct mlx5dr_rule_resize_info *resize_info; 60 }; 61 uint32_t rtc_0; /* The RTC into which the STE was inserted */ 62 uint32_t rtc_1; /* The RTC into which the STE was inserted */ 63 int action_ste_idx; /* STE array index */ 64 uint8_t status; /* enum mlx5dr_rule_status */ 65 uint8_t pending_wqes; 66 }; 67 68 void mlx5dr_rule_free_action_ste_idx(struct mlx5dr_rule *rule); 69 70 int mlx5dr_rule_move_hws_remove(struct mlx5dr_rule *rule, 71 void *queue, void *user_data); 72 73 int mlx5dr_rule_move_hws_add(struct mlx5dr_rule *rule, 74 struct mlx5dr_rule_attr *attr); 75 76 bool mlx5dr_rule_move_in_progress(struct mlx5dr_rule *rule); 77 78 void mlx5dr_rule_clear_resize_info(struct mlx5dr_rule *rule); 79 80 int mlx5dr_rule_create_root_no_comp(struct mlx5dr_rule *rule, 81 const struct rte_flow_item items[], 82 uint8_t num_actions, 83 struct mlx5dr_rule_action rule_actions[]); 84 85 int mlx5dr_rule_destroy_root_no_comp(struct mlx5dr_rule *rule); 86 87 #endif /* MLX5DR_RULE_H_ */ 88