xref: /netbsd-src/sys/arch/mips/rmi/rmixl_pcixvar.h (revision 3e67b5126ddeb22e44fbc51a3d61ae7f945500d3)
1 /*      $NetBSD: rmixl_pcixvar.h,v 1.2 2011/02/20 07:48:37 matt Exp $	*/
2 /*-
3  * Copyright (c) 2010 The NetBSD Foundation, Inc.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Cliff Neighbors.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef _MIPS_RMI_PCIX_VAR_H_
32 #define _MIPS_RMI_PCIX_VAR_H_
33 
34 #include <dev/pci/pcivar.h>
35 
36 typedef struct rmixl_pcix_evcnt {
37 	struct evcnt evcnt;
38 	char name[32];
39 } rmixl_pcix_evcnt_t;
40 
41 typedef struct rmixl_pcix_dispatch {
42 	int (*func)(void *);
43 	void *arg;
44 	u_int bitno;
45 	u_int irq;
46 	rmixl_pcix_evcnt_t *counts;	/* index by cpu */
47 } rmixl_pcix_dispatch_t;
48 
49 struct rmixl_pcix_softc;
50 
51 typedef struct rmixl_pcix_intr {
52 	struct rmixl_pcix_softc *sc;
53 	u_int intrpin;
54 	u_int ipl;
55 	void *ih;			/* mips interrupt handle */
56 	callout_t callout;		/* for delayed free of this struct */
57 	u_int intenb;			/* enabled flags for INT[ABCD] */
58 	u_int dispatch_count;
59 	rmixl_pcix_dispatch_t dispatch_data[1];
60 					/* variable length */
61 } rmixl_pcix_intr_t;
62 
63 #define RMIXL_PCIX_NINTR	4	/* PCI INT[A,B,C,D] */
64 
65 typedef struct rmixl_pcix_softc {
66 	device_t                	sc_dev;
67 	struct mips_pci_chipset 	sc_pci_chipset;
68 	bus_space_tag_t              	sc_pci_cfg_memt;
69 	bus_space_tag_t              	sc_pci_ecfg_memt;
70 	bus_dma_tag_t			sc_29bit_dmat;
71 	bus_dma_tag_t			sc_32bit_dmat;
72 	bus_dma_tag_t			sc_64bit_dmat;
73 	kmutex_t			sc_mutex;
74 	int				sc_tmsk;
75 	void 			       *sc_fatal_ih;
76         rmixl_pcix_evcnt_t             *sc_evcnts;
77 	rmixl_pcix_intr_t	       *sc_intr;
78 } rmixl_pcix_softc_t;
79 
80 
81 extern void rmixl_physaddr_init_pcix(struct extent *);
82 
83 #endif  /* _MIPS_RMI_PCIX_VAR_H_ */
84 
85