1 2 #ifndef _MINIX_CPUFEATURE_H 3 #define _MINIX_CPUFEATURE_H 1 4 5 #define _CPUF_I386_FPU 0 /* FPU-x87 FPU on Chip */ 6 #define _CPUF_I386_PSE 1 /* Page Size Extension */ 7 #define _CPUF_I386_PGE 2 /* Page Global Enable */ 8 #define _CPUF_I386_APIC_ON_CHIP 3 /* APIC is present on the chip */ 9 #define _CPUF_I386_TSC 4 /* Timestamp counter present */ 10 #define _CPUF_I386_SSE1234_12 5 /* Support for SSE/SSE2/SSE3/SSSE3/SSE4 11 * Extensions and FXSR 12 */ 13 #define _CPUF_I386_FXSR 6 14 #define _CPUF_I386_SSE 7 15 #define _CPUF_I386_SSE2 8 16 #define _CPUF_I386_SSE3 9 17 #define _CPUF_I386_SSSE3 10 18 #define _CPUF_I386_SSE4_1 11 19 #define _CPUF_I386_SSE4_2 12 20 21 #define _CPUF_I386_HTT 13 /* Supports HTT */ 22 #define _CPUF_I386_HTT_MAX_NUM 14 /* Maximal num of threads */ 23 24 #define _CPUF_I386_MTRR 15 25 #define _CPUF_I386_SYSENTER 16 /* Intel SYSENTER instrs */ 26 #define _CPUF_I386_SYSCALL 17 /* AMD SYSCALL instrs */ 27 28 #define _CPUF_I386_PAE 18 /* Page Address Extension */ 29 30 int _cpufeature(int featureno); 31 32 #endif 33