1; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4declare i32 @llvm.amdgcn.perm(i32, i32, i32) #0 5 6; GCN-LABEL: {{^}}v_perm_b32_v_v_v: 7; GCN: v_perm_b32 v{{[0-9]+}}, v0, v1, v2 8define amdgpu_ps void @v_perm_b32_v_v_v(i32 %src1, i32 %src2, i32 %src3, ptr addrspace(1) %out) #1 { 9 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 %src3) #0 10 store i32 %val, ptr addrspace(1) %out 11 ret void 12} 13 14; GCN-LABEL: {{^}}v_perm_b32_v_v_c: 15; GCN: v_perm_b32 v{{[0-9]+}}, v0, v1, {{[vs][0-9]+}} 16define amdgpu_ps void @v_perm_b32_v_v_c(i32 %src1, i32 %src2, ptr addrspace(1) %out) #1 { 17 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0 18 store i32 %val, ptr addrspace(1) %out 19 ret void 20} 21 22; GCN-LABEL: {{^}}v_perm_b32_s_v_c: 23; GCN: v_perm_b32 v{{[0-9]+}}, s0, v0, v{{[0-9]+}} 24define amdgpu_ps void @v_perm_b32_s_v_c(i32 inreg %src1, i32 %src2, ptr addrspace(1) %out) #1 { 25 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0 26 store i32 %val, ptr addrspace(1) %out 27 ret void 28} 29 30; GCN-LABEL: {{^}}v_perm_b32_s_s_c: 31; GCN: v_perm_b32 v{{[0-9]+}}, s0, v{{[0-9]+}}, v{{[0-9]+}} 32define amdgpu_ps void @v_perm_b32_s_s_c(i32 inreg %src1, i32 inreg %src2, ptr addrspace(1) %out) #1 { 33 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 12345) #0 34 store i32 %val, ptr addrspace(1) %out 35 ret void 36} 37 38; GCN-LABEL: {{^}}v_perm_b32_v_s_i: 39; GCN: v_perm_b32 v{{[0-9]+}}, v0, s0, 1 40define amdgpu_ps void @v_perm_b32_v_s_i(i32 %src1, i32 inreg %src2, ptr addrspace(1) %out) #1 { 41 %val = call i32 @llvm.amdgcn.perm(i32 %src1, i32 %src2, i32 1) #0 42 store i32 %val, ptr addrspace(1) %out 43 ret void 44} 45 46attributes #0 = { nounwind readnone } 47attributes #1 = { nounwind } 48