xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll (revision b1bcb7ca460fcd317bbc8309e14c8761bf8394e0)
1; RUN: llc -global-isel=0 -mtriple=amdgcn--amdhsa < %s | FileCheck -check-prefix=GCN %s
2; RUN: llc -global-isel -mtriple=amdgcn--amdhsa < %s | FileCheck -check-prefix=GCN %s
3
4declare i64 @llvm.amdgcn.dispatch.id() #1
5
6; GCN-LABEL: {{^}}dispatch_id:
7; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s10
8; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s11
9; GCN: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[LO]]:[[HI]]]
10; GCN: .amdhsa_user_sgpr_dispatch_id 1
11define amdgpu_kernel void @dispatch_id(ptr addrspace(1) %out) #0 {
12  %tmp0 = call i64 @llvm.amdgcn.dispatch.id()
13  store i64 %tmp0, ptr addrspace(1) %out
14  ret void
15}
16
17; GCN-LABEL: {{^}}dispatch_id_opt0:
18; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s8
19; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s9
20; GCN: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[LO]]:[[HI]]]
21; GCN: .amdhsa_user_sgpr_dispatch_id 1
22define amdgpu_kernel void @dispatch_id_opt0(ptr addrspace(1) %out) #2 {
23  %tmp0 = call i64 @llvm.amdgcn.dispatch.id()
24  store i64 %tmp0, ptr addrspace(1) %out
25  ret void
26}
27
28; GCN-LABEL: {{^}}dispatch_id_opt1:
29; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s6
30; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s7
31; GCN: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[LO]]:[[HI]]]
32; GCN: .amdhsa_user_sgpr_dispatch_id 1
33define amdgpu_kernel void @dispatch_id_opt1(ptr addrspace(1) %out) #3 {
34  %tmp0 = call i64 @llvm.amdgcn.dispatch.id()
35  store i64 %tmp0, ptr addrspace(1) %out
36  ret void
37}
38
39; GCN-LABEL: {{^}}dispatch_id_opt2:
40; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s4
41; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s5
42; GCN: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[LO]]:[[HI]]]
43; GCN: .amdhsa_user_sgpr_dispatch_id 1
44define amdgpu_kernel void @dispatch_id_opt2() #4 {
45  %tmp0 = call i64 @llvm.amdgcn.dispatch.id()
46  store i64 %tmp0, ptr addrspace(1) null
47  ret void
48}
49
50attributes #0 = { nounwind }
51attributes #1 = { nounwind readnone }
52attributes #2 = { "amdgpu-no-dispatch-ptr" }
53attributes #3 = { "amdgpu-no-dispatch-ptr" "amdgpu-no-queue-ptr" }
54attributes #4 = { "amdgpu-no-dispatch-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-implicitarg-ptr" }
55
56!llvm.module.flags = !{!0}
57!0 = !{i32 1, !"amdhsa_code_object_version", i32 400}
58