xref: /llvm-project/llvm/include/llvm/TargetParser/LoongArchTargetParser.h (revision 19834b4623fd1e7ae5185ed76031b407c3fa7a47)
1 //==-- LoongArch64TargetParser - Parser for LoongArch64 features --*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise LoongArch hardware features
10 // such as CPU/ARCH and extension names.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_TARGETPARSER_LOONGARCHTARGETPARSER_H
15 #define LLVM_TARGETPARSER_LOONGARCHTARGETPARSER_H
16 
17 #include "llvm/TargetParser/Triple.h"
18 #include <vector>
19 
20 namespace llvm {
21 class StringRef;
22 
23 namespace LoongArch {
24 
25 enum FeatureKind : uint32_t {
26   // 64-bit ISA is available.
27   FK_64BIT = 1 << 1,
28 
29   // Single-precision floating-point instructions are available.
30   FK_FP32 = 1 << 2,
31 
32   // Double-precision floating-point instructions are available.
33   FK_FP64 = 1 << 3,
34 
35   // Loongson SIMD Extension is available.
36   FK_LSX = 1 << 4,
37 
38   // Loongson Advanced SIMD Extension is available.
39   FK_LASX = 1 << 5,
40 
41   // Loongson Binary Translation Extension is available.
42   FK_LBT = 1 << 6,
43 
44   // Loongson Virtualization Extension is available.
45   FK_LVZ = 1 << 7,
46 
47   // Allow memory accesses to be unaligned.
48   FK_UAL = 1 << 8,
49 
50   // Floating-point approximate reciprocal instructions are available.
51   FK_FRECIPE = 1 << 9,
52 
53   // Atomic memory swap and add instructions for byte and half word are
54   // available.
55   FK_LAM_BH = 1 << 10,
56 
57   // Atomic memory compare and swap instructions for byte, half word, word and
58   // double word are available.
59   FK_LAMCAS = 1 << 11,
60 
61   // Do not generate load-load barrier instructions (dbar 0x700).
62   FK_LD_SEQ_SA = 1 << 12,
63 
64   // Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
65   FK_DIV32 = 1 << 13,
66 
67   // sc.q is available.
68   FK_SCQ = 1 << 14,
69 };
70 
71 struct FeatureInfo {
72   StringRef Name;
73   FeatureKind Kind;
74 };
75 
76 enum class ArchKind {
77 #define LOONGARCH_ARCH(NAME, KIND, FEATURES) KIND,
78 #include "LoongArchTargetParser.def"
79 };
80 
81 struct ArchInfo {
82   StringRef Name;
83   ArchKind Kind;
84   uint32_t Features;
85 };
86 
87 bool isValidArchName(StringRef Arch);
88 bool getArchFeatures(StringRef Arch, std::vector<StringRef> &Features);
89 bool isValidCPUName(StringRef TuneCPU);
90 void fillValidCPUList(SmallVectorImpl<StringRef> &Values);
91 StringRef getDefaultArch(bool Is64Bit);
92 
93 } // namespace LoongArch
94 
95 } // namespace llvm
96 
97 #endif // LLVM_TARGETPARSER_LOONGARCHTARGETPARSER_H
98