xref: /llvm-project/llvm/include/llvm/CodeGen/Passes.h (revision de209fa11b5455155228bcdba012b6074388b917)
1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
18 #include "llvm/Support/Discriminator.h"
19 #include "llvm/CodeGen/RegAllocCommon.h"
20 
21 #include <functional>
22 #include <string>
23 
24 namespace llvm {
25 
26 class FunctionPass;
27 class MachineFunction;
28 class MachineFunctionPass;
29 class ModulePass;
30 class Pass;
31 class TargetMachine;
32 class raw_ostream;
33 
34 template <typename T> class IntrusiveRefCntPtr;
35 namespace vfs {
36 class FileSystem;
37 } // namespace vfs
38 
39 } // End llvm namespace
40 
41 // List of target independent CodeGen pass IDs.
42 namespace llvm {
43 
44   /// AtomicExpandPass - At IR level this pass replace atomic instructions with
45   /// __atomic_* library calls, or target specific instruction which implement the
46   /// same semantics in a way which better fits the target backend.
47   FunctionPass *createAtomicExpandLegacyPass();
48 
49   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
50   /// work well with unreachable basic blocks (what live ranges make sense for a
51   /// block that cannot be reached?).  As such, a code generator should either
52   /// not instruction select unreachable blocks, or run this pass as its
53   /// last LLVM modifying pass to clean up blocks that are not reachable from
54   /// the entry block.
55   FunctionPass *createUnreachableBlockEliminationPass();
56 
57   /// createGCEmptyBasicblocksPass - Empty basic blocks (basic blocks without
58   /// real code) appear as the result of optimization passes removing
59   /// instructions. These blocks confuscate profile analysis (e.g., basic block
60   /// sections) since they will share the address of their fallthrough blocks.
61   /// This pass garbage-collects such basic blocks.
62   MachineFunctionPass *createGCEmptyBasicBlocksPass();
63 
64   /// createBasicBlockSections Pass - This pass assigns sections to machine
65   /// basic blocks and is enabled with -fbasic-block-sections.
66   MachineFunctionPass *createBasicBlockSectionsPass();
67 
68   MachineFunctionPass *createBasicBlockPathCloningPass();
69 
70   /// createMachineFunctionSplitterPass - This pass splits machine functions
71   /// using profile information.
72   MachineFunctionPass *createMachineFunctionSplitterPass();
73 
74   /// createStaticDataSplitterPass - This pass partitions a static data section
75   /// into a hot and cold section using profile information.
76   MachineFunctionPass *createStaticDataSplitterPass();
77 
78   /// MachineFunctionPrinter pass - This pass prints out the machine function to
79   /// the given stream as a debugging tool.
80   MachineFunctionPass *
81   createMachineFunctionPrinterPass(raw_ostream &OS,
82                                    const std::string &Banner ="");
83 
84   /// StackFramePrinter pass - This pass prints out the machine function's
85   /// stack frame to the given stream as a debugging tool.
86   MachineFunctionPass *createStackFrameLayoutAnalysisPass();
87 
88   /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
89   /// using the MIR serialization format.
90   MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
91 
92   /// This pass resets a MachineFunction when it has the FailedISel property
93   /// as if it was just created.
94   /// If EmitFallbackDiag is true, the pass will emit a
95   /// DiagnosticInfoISelFallback for every MachineFunction it resets.
96   /// If AbortOnFailedISel is true, abort compilation instead of resetting.
97   MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
98                                                       bool AbortOnFailedISel);
99 
100   /// createCodeGenPrepareLegacyPass - Transform the code to expose more pattern
101   /// matching during instruction selection.
102   FunctionPass *createCodeGenPrepareLegacyPass();
103 
104   /// This pass implements generation of target-specific intrinsics to support
105   /// handling of complex number arithmetic
106   FunctionPass *createComplexDeinterleavingPass(const TargetMachine *TM);
107 
108   /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
109   /// load-linked/store-conditional loops.
110   extern char &AtomicExpandID;
111 
112   /// MachineLoopInfo - This pass is a loop analysis pass.
113   extern char &MachineLoopInfoID;
114 
115   /// MachineDominators - This pass is a machine dominators analysis pass.
116   extern char &MachineDominatorsID;
117 
118   /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
119   extern char &MachineDominanceFrontierID;
120 
121   /// MachineRegionInfo - This pass computes SESE regions for machine functions.
122   extern char &MachineRegionInfoPassID;
123 
124   /// EdgeBundles analysis - Bundle machine CFG edges.
125   extern char &EdgeBundlesWrapperLegacyID;
126 
127   /// LiveVariables pass - This pass computes the set of blocks in which each
128   /// variable is life and sets machine operand kill flags.
129   extern char &LiveVariablesID;
130 
131   /// PHIElimination - This pass eliminates machine instruction PHI nodes
132   /// by inserting copy instructions.  This destroys SSA information, but is the
133   /// desired input for some register allocators.  This pass is "required" by
134   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
135   extern char &PHIEliminationID;
136 
137   /// LiveIntervals - This analysis keeps track of the live ranges of virtual
138   /// and physical registers.
139   extern char &LiveIntervalsID;
140 
141   /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
142   extern char &LiveStacksID;
143 
144   /// TwoAddressInstruction - This pass reduces two-address instructions to
145   /// use two operands. This destroys SSA information but it is desired by
146   /// register allocators.
147   extern char &TwoAddressInstructionPassID;
148 
149   /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
150   extern char &ProcessImplicitDefsID;
151 
152   /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
153   extern char &RegisterCoalescerID;
154 
155   /// MachineScheduler - This pass schedules machine instructions.
156   extern char &MachineSchedulerID;
157 
158   /// PostMachineScheduler - This pass schedules machine instructions postRA.
159   extern char &PostMachineSchedulerID;
160 
161   /// SpillPlacement analysis. Suggest optimal placement of spill code between
162   /// basic blocks.
163   extern char &SpillPlacementID;
164 
165   /// ShrinkWrap pass. Look for the best place to insert save and restore
166   // instruction and update the MachineFunctionInfo with that information.
167   extern char &ShrinkWrapID;
168 
169   /// LiveRangeShrink pass. Move instruction close to its definition to shrink
170   /// the definition's live range.
171   extern char &LiveRangeShrinkID;
172 
173   /// Greedy register allocator.
174   extern char &RAGreedyID;
175 
176   /// Basic register allocator.
177   extern char &RABasicID;
178 
179   /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
180   /// assigned in VirtRegMap.
181   extern char &VirtRegRewriterID;
182   FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
183 
184   /// UnreachableMachineBlockElimination - This pass removes unreachable
185   /// machine basic blocks.
186   extern char &UnreachableMachineBlockElimID;
187 
188   /// DeadMachineInstructionElim - This pass removes dead machine instructions.
189   extern char &DeadMachineInstructionElimID;
190 
191   /// This pass adds dead/undef flags after analyzing subregister lanes.
192   extern char &DetectDeadLanesID;
193 
194   /// This pass perform post-ra machine sink for COPY instructions.
195   extern char &PostRAMachineSinkingID;
196 
197   /// This pass adds flow sensitive discriminators.
198   extern char &MIRAddFSDiscriminatorsID;
199 
200   /// This pass reads flow sensitive profile.
201   extern char &MIRProfileLoaderPassID;
202 
203   // This pass gives undef values a Pseudo Instruction definition for
204   // Instructions to ensure early-clobber is followed when using the greedy
205   // register allocator.
206   extern char &InitUndefID;
207 
208   /// FastRegisterAllocation Pass - This pass register allocates as fast as
209   /// possible. It is best suited for debug code where live ranges are short.
210   ///
211   FunctionPass *createFastRegisterAllocator();
212   FunctionPass *createFastRegisterAllocator(RegAllocFilterFunc F,
213                                             bool ClearVirtRegs);
214 
215   /// BasicRegisterAllocation Pass - This pass implements a degenerate global
216   /// register allocator using the basic regalloc framework.
217   ///
218   FunctionPass *createBasicRegisterAllocator();
219   FunctionPass *createBasicRegisterAllocator(RegAllocFilterFunc F);
220 
221   /// Greedy register allocation pass - This pass implements a global register
222   /// allocator for optimized builds.
223   ///
224   FunctionPass *createGreedyRegisterAllocator();
225   FunctionPass *createGreedyRegisterAllocator(RegAllocFilterFunc F);
226 
227   /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
228   /// Quadratic Prograaming (PBQP) based register allocator.
229   ///
230   FunctionPass *createDefaultPBQPRegisterAllocator();
231 
232   /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
233   /// and eliminates abstract frame references.
234   extern char &PrologEpilogCodeInserterID;
235   MachineFunctionPass *createPrologEpilogInserterPass();
236 
237   /// ExpandPostRAPseudos - This pass expands pseudo instructions after
238   /// register allocation.
239   extern char &ExpandPostRAPseudosID;
240 
241   /// PostRAHazardRecognizer - This pass runs the post-ra hazard
242   /// recognizer.
243   extern char &PostRAHazardRecognizerID;
244 
245   /// PostRAScheduler - This pass performs post register allocation
246   /// scheduling.
247   extern char &PostRASchedulerID;
248 
249   /// BranchFolding - This pass performs machine code CFG based
250   /// optimizations to delete branches to branches, eliminate branches to
251   /// successor blocks (creating fall throughs), and eliminating branches over
252   /// branches.
253   extern char &BranchFolderPassID;
254 
255   /// BranchRelaxation - This pass replaces branches that need to jump further
256   /// than is supported by a branch instruction.
257   extern char &BranchRelaxationPassID;
258 
259   /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
260   extern char &MachineFunctionPrinterPassID;
261 
262   /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
263   /// serialization format.
264   extern char &MIRPrintingPassID;
265 
266   /// TailDuplicate - Duplicate blocks with unconditional branches
267   /// into tails of their predecessors.
268   extern char &TailDuplicateLegacyID;
269 
270   /// Duplicate blocks with unconditional branches into tails of their
271   /// predecessors. Variant that works before register allocation.
272   extern char &EarlyTailDuplicateLegacyID;
273 
274   /// MachineTraceMetrics - This pass computes critical path and CPU resource
275   /// usage in an ensemble of traces.
276   extern char &MachineTraceMetricsID;
277 
278   /// EarlyIfConverter - This pass performs if-conversion on SSA form by
279   /// inserting cmov instructions.
280   extern char &EarlyIfConverterLegacyID;
281 
282   /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
283   /// predicating if/else block and insert select at the join point.
284   extern char &EarlyIfPredicatorID;
285 
286   /// This pass performs instruction combining using trace metrics to estimate
287   /// critical-path and resource depth.
288   extern char &MachineCombinerID;
289 
290   /// StackSlotColoring - This pass performs stack coloring and merging.
291   /// It merges disjoint allocas to reduce the stack size.
292   extern char &StackColoringLegacyID;
293 
294   /// StackFramePrinter - This pass prints the stack frame layout and variable
295   /// mappings.
296   extern char &StackFrameLayoutAnalysisPassID;
297 
298   /// IfConverter - This pass performs machine code if conversion.
299   extern char &IfConverterID;
300 
301   FunctionPass *createIfConverter(
302       std::function<bool(const MachineFunction &)> Ftor);
303 
304   /// MachineBlockPlacement - This pass places basic blocks based on branch
305   /// probabilities.
306   extern char &MachineBlockPlacementID;
307 
308   /// MachineBlockPlacementStats - This pass collects statistics about the
309   /// basic block placement using branch probabilities and block frequency
310   /// information.
311   extern char &MachineBlockPlacementStatsID;
312 
313   /// GCLowering Pass - Used by gc.root to perform its default lowering
314   /// operations.
315   FunctionPass *createGCLoweringPass();
316 
317   /// GCLowering Pass - Used by gc.root to perform its default lowering
318   /// operations.
319   extern char &GCLoweringID;
320 
321   /// ShadowStackGCLowering - Implements the custom lowering mechanism
322   /// used by the shadow stack GC.  Only runs on functions which opt in to
323   /// the shadow stack collector.
324   FunctionPass *createShadowStackGCLoweringPass();
325 
326   /// ShadowStackGCLowering - Implements the custom lowering mechanism
327   /// used by the shadow stack GC.
328   extern char &ShadowStackGCLoweringID;
329 
330   /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
331   /// in machine code. Must be added very late during code generation, just
332   /// prior to output, and importantly after all CFG transformations (such as
333   /// branch folding).
334   extern char &GCMachineCodeAnalysisID;
335 
336   /// MachineCSE - This pass performs global CSE on machine instructions.
337   extern char &MachineCSELegacyID;
338 
339   /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
340   /// according to the semantics of the instruction as well as hoists
341   /// code.
342   extern char &MIRCanonicalizerID;
343 
344   /// ImplicitNullChecks - This pass folds null pointer checks into nearby
345   /// memory operations.
346   extern char &ImplicitNullChecksID;
347 
348   /// This pass performs loop invariant code motion on machine instructions.
349   extern char &MachineLICMID;
350 
351   /// This pass performs loop invariant code motion on machine instructions.
352   /// This variant works before register allocation. \see MachineLICMID.
353   extern char &EarlyMachineLICMID;
354 
355   /// MachineSinking - This pass performs sinking on machine instructions.
356   extern char &MachineSinkingID;
357 
358   /// MachineCopyPropagation - This pass performs copy propagation on
359   /// machine instructions.
360   extern char &MachineCopyPropagationID;
361 
362   MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
363 
364   /// MachineLateInstrsCleanup - This pass removes redundant identical
365   /// instructions after register allocation and rematerialization.
366   extern char &MachineLateInstrsCleanupID;
367 
368   /// PeepholeOptimizer - This pass performs peephole optimizations -
369   /// like extension and comparison eliminations.
370   extern char &PeepholeOptimizerLegacyID;
371 
372   /// OptimizePHIs - This pass optimizes machine instruction PHIs
373   /// to take advantage of opportunities created during DAG legalization.
374   extern char &OptimizePHIsLegacyID;
375 
376   /// StackSlotColoring - This pass performs stack slot coloring.
377   extern char &StackSlotColoringID;
378 
379   /// This pass lays out funclets contiguously.
380   extern char &FuncletLayoutID;
381 
382   /// This pass inserts the XRay instrumentation sleds if they are supported by
383   /// the target platform.
384   extern char &XRayInstrumentationID;
385 
386   /// This pass inserts FEntry calls
387   extern char &FEntryInserterID;
388 
389   /// This pass implements the "patchable-function" attribute.
390   extern char &PatchableFunctionID;
391 
392   /// createStackProtectorPass - This pass adds stack protectors to functions.
393   ///
394   FunctionPass *createStackProtectorPass();
395 
396   /// createMachineVerifierPass - This pass verifies cenerated machine code
397   /// instructions for correctness.
398   ///
399   FunctionPass *createMachineVerifierPass(const std::string& Banner);
400 
401   /// createDwarfEHPass - This pass mulches exception handling code into a form
402   /// adapted to code generation.  Required if using dwarf exception handling.
403   FunctionPass *createDwarfEHPass(CodeGenOptLevel OptLevel);
404 
405   /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
406   /// in addition to the Itanium LSDA based personalities.
407   FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
408 
409   /// createSjLjEHPreparePass - This pass adapts exception handling code to use
410   /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
411   ///
412   FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
413 
414   /// createWasmEHPass - This pass adapts exception handling code to use
415   /// WebAssembly's exception handling scheme.
416   FunctionPass *createWasmEHPass();
417 
418   /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
419   /// slots relative to one another and allocates base registers to access them
420   /// when it is estimated by the target to be out of range of normal frame
421   /// pointer or stack pointer index addressing.
422   extern char &LocalStackSlotAllocationID;
423 
424   /// This pass expands pseudo-instructions, reserves registers and adjusts
425   /// machine frame information.
426   extern char &FinalizeISelID;
427 
428   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
429   extern char &UnpackMachineBundlesID;
430 
431   FunctionPass *
432   createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
433 
434   /// FinalizeMachineBundles - This pass finalize machine instruction
435   /// bundles (created earlier, e.g. during pre-RA scheduling).
436   extern char &FinalizeMachineBundlesID;
437 
438   /// StackMapLiveness - This pass analyses the register live-out set of
439   /// stackmap/patchpoint intrinsics and attaches the calculated information to
440   /// the intrinsic for later emission to the StackMap.
441   extern char &StackMapLivenessID;
442 
443   // MachineSanitizerBinaryMetadata - appends/finalizes sanitizer binary
444   // metadata after llvm SanitizerBinaryMetadata pass.
445   extern char &MachineSanitizerBinaryMetadataID;
446 
447   /// RemoveLoadsIntoFakeUses pass.
448   extern char &RemoveLoadsIntoFakeUsesID;
449 
450   /// RemoveRedundantDebugValues pass.
451   extern char &RemoveRedundantDebugValuesID;
452 
453   /// MachineCFGPrinter pass.
454   extern char &MachineCFGPrinterID;
455 
456   /// LiveDebugValues pass
457   extern char &LiveDebugValuesID;
458 
459   /// InterleavedAccess Pass - This pass identifies and matches interleaved
460   /// memory accesses to target specific intrinsics.
461   ///
462   FunctionPass *createInterleavedAccessPass();
463 
464   /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
465   /// combines them into wide loads detectable by InterleavedAccessPass
466   ///
467   FunctionPass *createInterleavedLoadCombinePass();
468 
469   /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
470   /// TLS variables for the emulated TLS model.
471   ///
472   ModulePass *createLowerEmuTLSPass();
473 
474   /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
475   /// instructions.  This is unsafe to do earlier because a pass may combine the
476   /// constant initializer into the load, which may result in an overflowing
477   /// evaluation.
478   ModulePass *createPreISelIntrinsicLoweringPass();
479 
480   /// GlobalMerge - This pass merges internal (by default) globals into structs
481   /// to enable reuse of a base pointer by indexed addressing modes.
482   /// It can also be configured to focus on size optimizations only.
483   ///
484   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
485                               bool OnlyOptimizeForSize = false,
486                               bool MergeExternalByDefault = false,
487                               bool MergeConstantByDefault = false,
488                               bool MergeConstAggressiveByDefault = false);
489 
490   /// This pass splits the stack into a safe stack and an unsafe stack to
491   /// protect against stack-based overflow vulnerabilities.
492   FunctionPass *createSafeStackPass();
493 
494   /// This pass detects subregister lanes in a virtual register that are used
495   /// independently of other lanes and splits them into separate virtual
496   /// registers.
497   extern char &RenameIndependentSubregsID;
498 
499   /// This pass is executed POST-RA to collect which physical registers are
500   /// preserved by given machine function.
501   FunctionPass *createRegUsageInfoCollector();
502 
503   /// Return a MachineFunction pass that identifies call sites
504   /// and propagates register usage information of callee to caller
505   /// if available with PysicalRegisterUsageInfo pass.
506   FunctionPass *createRegUsageInfoPropPass();
507 
508   /// This pass performs software pipelining on machine instructions.
509   extern char &MachinePipelinerID;
510 
511   /// This pass frees the memory occupied by the MachineFunction.
512   FunctionPass *createFreeMachineFunctionPass();
513 
514   /// This pass performs merging similar functions globally.
515   ModulePass *createGlobalMergeFuncPass();
516 
517   /// This pass performs outlining on machine instructions directly before
518   /// printing assembly.
519   ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
520 
521   /// This pass expands the reduction intrinsics into sequences of shuffles.
522   FunctionPass *createExpandReductionsPass();
523 
524   // This pass replaces intrinsics operating on vector operands with calls to
525   // the corresponding function in a vector library (e.g., SVML, libmvec).
526   FunctionPass *createReplaceWithVeclibLegacyPass();
527 
528   // Expands large div/rem instructions.
529   FunctionPass *createExpandLargeDivRemPass();
530 
531   // Expands large div/rem instructions.
532   FunctionPass *createExpandLargeFpConvertPass();
533 
534   // This pass expands memcmp() to load/stores.
535   FunctionPass *createExpandMemCmpLegacyPass();
536 
537   /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
538   FunctionPass *createBreakFalseDeps();
539 
540   // This pass expands indirectbr instructions.
541   FunctionPass *createIndirectBrExpandPass();
542 
543   /// Creates CFI Fixup pass. \see CFIFixup.cpp
544   FunctionPass *createCFIFixup();
545 
546   /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
547   FunctionPass *createCFIInstrInserter();
548 
549   /// Creates CFGuard longjmp target identification pass.
550   /// \see CFGuardLongjmp.cpp
551   FunctionPass *createCFGuardLongjmpPass();
552 
553   /// Creates EHContGuard catchret target identification pass.
554   /// \see EHContGuardCatchret.cpp
555   FunctionPass *createEHContGuardCatchretPass();
556 
557   /// Create Hardware Loop pass. \see HardwareLoops.cpp
558   FunctionPass *createHardwareLoopsLegacyPass();
559 
560   /// This pass inserts pseudo probe annotation for callsite profiling.
561   FunctionPass *createPseudoProbeInserter();
562 
563   /// Create IR Type Promotion pass. \see TypePromotion.cpp
564   FunctionPass *createTypePromotionLegacyPass();
565 
566   /// Add Flow Sensitive Discriminators. PassNum specifies the
567   /// sequence number of this pass (starting from 1).
568   FunctionPass *
569   createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P);
570 
571   /// Read Flow Sensitive Profile.
572   FunctionPass *
573   createMIRProfileLoaderPass(std::string File, std::string RemappingFile,
574                              sampleprof::FSDiscriminatorPass P,
575                              IntrusiveRefCntPtr<vfs::FileSystem> FS);
576 
577   /// Creates MIR Debugify pass. \see MachineDebugify.cpp
578   ModulePass *createDebugifyMachineModulePass();
579 
580   /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
581   /// If OnlyDebugified is true then it will only strip debug info if it was
582   /// added by a Debugify pass. The module will be left unchanged if the debug
583   /// info was generated by another source such as clang.
584   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
585 
586   /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
587   ModulePass *createCheckDebugMachineModulePass();
588 
589   /// The pass fixups statepoint machine instruction to replace usage of
590   /// caller saved registers with stack slots.
591   extern char &FixupStatepointCallerSavedID;
592 
593   /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
594   /// or split the data to two <128 x i32>.
595   FunctionPass *createX86LowerAMXTypePass();
596 
597   /// The pass transforms amx intrinsics to scalar operation if the function has
598   /// optnone attribute or it is O0.
599   FunctionPass *createX86LowerAMXIntrinsicsPass();
600 
601   /// When learning an eviction policy, extract score(reward) information,
602   /// otherwise this does nothing
603   FunctionPass *createRegAllocScoringPass();
604 
605   /// JMC instrument pass.
606   ModulePass *createJMCInstrumenterPass();
607 
608   /// This pass converts conditional moves to conditional jumps when profitable.
609   FunctionPass *createSelectOptimizePass();
610 
611   FunctionPass *createCallBrPass();
612 
613   /// Lowers KCFI operand bundles for indirect calls.
614   FunctionPass *createKCFIPass();
615 } // End llvm namespace
616 
617 #endif
618