xref: /dpdk/drivers/net/ionic/ionic_rxtx.h (revision fffea1aeb08985c93e2d785c1637f765d638537d)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2018-2022 Advanced Micro Devices, Inc.
3  */
4 
5 #ifndef _IONIC_RXTX_H_
6 #define _IONIC_RXTX_H_
7 
8 #include <stdint.h>
9 
10 #include "ionic_if.h"
11 
12 struct ionic_rx_qcq;
13 struct ionic_tx_qcq;
14 struct rte_eth_dev;
15 struct rte_eth_rxconf;
16 struct rte_eth_rxq_info;
17 struct rte_eth_txconf;
18 struct rte_eth_txq_info;
19 struct rte_mbuf;
20 struct rte_mempool;
21 
22 struct ionic_rx_service {
23 	/* cb in */
24 	struct rte_mbuf **rx_pkts;
25 	/* cb out */
26 	uint16_t nb_rx;
27 };
28 
29 #define IONIC_CSUM_FLAG_MASK	(IONIC_RXQ_COMP_CSUM_F_VLAN - 1)
30 
31 extern const uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK];
32 extern const uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK];
33 
34 /* ionic_rxtx.c */
35 int ionic_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
36 	uint16_t nb_desc, uint32_t socket_id,
37 	const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp);
38 void ionic_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
39 int ionic_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
40 int ionic_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
41 
42 int ionic_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
43 	uint16_t nb_desc,  uint32_t socket_id,
44 	const struct rte_eth_txconf *tx_conf);
45 void ionic_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
46 int ionic_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
47 int ionic_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
48 
49 /* Helpers for optimized dev_start() */
50 int ionic_dev_rx_queue_start_firsthalf(struct rte_eth_dev *dev,
51 	uint16_t rx_queue_id);
52 int ionic_dev_rx_queue_start_secondhalf(struct rte_eth_dev *dev,
53 	uint16_t rx_queue_id);
54 int ionic_dev_tx_queue_start_firsthalf(struct rte_eth_dev *dev,
55 	uint16_t tx_queue_id);
56 int ionic_dev_tx_queue_start_secondhalf(struct rte_eth_dev *dev,
57 	uint16_t tx_queue_id);
58 
59 /* Helpers for optimized dev_stop() */
60 void ionic_dev_rx_queue_stop_firsthalf(struct rte_eth_dev *dev,
61 	uint16_t rx_queue_id);
62 void ionic_dev_rx_queue_stop_secondhalf(struct rte_eth_dev *dev,
63 	uint16_t rx_queue_id);
64 void ionic_dev_tx_queue_stop_firsthalf(struct rte_eth_dev *dev,
65 	uint16_t tx_queue_id);
66 void ionic_dev_tx_queue_stop_secondhalf(struct rte_eth_dev *dev,
67 	uint16_t tx_queue_id);
68 
69 void ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
70 	struct rte_eth_rxq_info *qinfo);
71 void ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
72 	struct rte_eth_txq_info *qinfo);
73 
74 int ionic_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
75 int ionic_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
76 
77 const uint32_t *ionic_dev_supported_ptypes_get(struct rte_eth_dev *dev,
78 					       size_t *no_of_elements);
79 
80 int ionic_tx_tso(struct ionic_tx_qcq *txq, struct rte_mbuf *txm);
81 
82 uint16_t ionic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
83 	uint16_t nb_pkts);
84 
85 /* ionic_rxtx_simple.c */
86 uint16_t ionic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
87 	uint16_t nb_pkts);
88 uint16_t ionic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
89 	uint16_t nb_pkts);
90 
91 int ionic_rx_fill(struct ionic_rx_qcq *rxq);
92 
93 /* ionic_rxtx_sg.c */
94 uint16_t ionic_recv_pkts_sg(void *rx_queue, struct rte_mbuf **rx_pkts,
95 	uint16_t nb_pkts);
96 uint16_t ionic_xmit_pkts_sg(void *tx_queue, struct rte_mbuf **tx_pkts,
97 	uint16_t nb_pkts);
98 
99 int ionic_rx_fill_sg(struct ionic_rx_qcq *rxq);
100 
101 static inline void
ionic_rxq_flush(struct ionic_queue * q)102 ionic_rxq_flush(struct ionic_queue *q)
103 {
104 #ifndef RTE_LIBRTE_IONIC_PMD_EMBEDDED
105 	struct ionic_rxq_desc *desc_base = q->base;
106 	struct ionic_rxq_desc *cmb_desc_base = q->cmb_base;
107 
108 	if (q->cmb_base) {
109 		if (q->head_idx < q->cmb_head_idx) {
110 			/* copy [cmb_head, num_descs) */
111 			rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx],
112 				(void *)&desc_base[q->cmb_head_idx],
113 				(q->num_descs - q->cmb_head_idx) * sizeof(*desc_base));
114 			/* copy [0, head) */
115 			rte_memcpy((void *)&cmb_desc_base[0],
116 				(void *)&desc_base[0],
117 				q->head_idx * sizeof(*desc_base));
118 		} else {
119 			/* copy [cmb_head, head) */
120 			rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx],
121 				(void *)&desc_base[q->cmb_head_idx],
122 				(q->head_idx - q->cmb_head_idx) * sizeof(*desc_base));
123 		}
124 		q->cmb_head_idx = q->head_idx;
125 	}
126 #endif /* RTE_LIBRTE_IONIC_PMD_EMBEDDED */
127 
128 	ionic_q_flush(q);
129 }
130 
131 static inline void
ionic_txq_flush(struct ionic_queue * q)132 ionic_txq_flush(struct ionic_queue *q)
133 {
134 #ifndef RTE_LIBRTE_IONIC_PMD_EMBEDDED
135 	struct ionic_txq_desc *desc_base = q->base;
136 	struct ionic_txq_desc *cmb_desc_base = q->cmb_base;
137 
138 	if (q->cmb_base) {
139 		if (q->head_idx < q->cmb_head_idx) {
140 			/* copy [cmb_head, num_descs) */
141 			rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx],
142 				(void *)&desc_base[q->cmb_head_idx],
143 				(q->num_descs - q->cmb_head_idx) * sizeof(*desc_base));
144 			/* copy [0, head) */
145 			rte_memcpy((void *)&cmb_desc_base[0],
146 				(void *)&desc_base[0],
147 				q->head_idx * sizeof(*desc_base));
148 		} else {
149 			/* copy [cmb_head, head) */
150 			rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx],
151 				(void *)&desc_base[q->cmb_head_idx],
152 				(q->head_idx - q->cmb_head_idx) * sizeof(*desc_base));
153 		}
154 		q->cmb_head_idx = q->head_idx;
155 	}
156 #endif /* RTE_LIBRTE_IONIC_PMD_EMBEDDED */
157 
158 	ionic_q_flush(q);
159 }
160 
161 #endif /* _IONIC_RXTX_H_ */
162