1 /* $NetBSD: iomd_irqhandler.c,v 1.24 2020/11/20 18:18:51 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Mark Brinicombe
21 * for the NetBSD Project.
22 * 4. The name of the company nor the name of the author may be used to
23 * endorse or promote products derived from this software without specific
24 * prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * IRQ/FIQ initialisation, claim, release and handler routines
38 *
39 * from: irqhandler.c,v 1.14 1997/04/02 21:52:19 christos Exp $
40 */
41
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.24 2020/11/20 18:18:51 thorpej Exp $");
44
45 #include "opt_irqstats.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/syslog.h>
50 #include <sys/kmem.h>
51
52 #include <arm/cpufunc.h>
53 #include <arm/iomd/iomdreg.h>
54 #include <arm/iomd/iomdvar.h>
55
56 #include <machine/intr.h>
57 #include <machine/cpu.h>
58
59 irqhandler_t *irqhandlers[NIRQS];
60
61 u_int current_mask;
62 u_int actual_mask;
63 u_int disabled_mask;
64 u_int irqmasks[NIPL];
65
66 extern char *_intrnames;
67
68 /* Prototypes */
69
70 extern void set_spl_masks(void);
71
72 /*
73 * void irq_init(void)
74 *
75 * Initialise the IRQ/FIQ sub system
76 */
77
78 void
irq_init(void)79 irq_init(void)
80 {
81 int loop;
82
83 /* Clear all the IRQ handlers and the irq block masks */
84 for (loop = 0; loop < NIRQS; ++loop)
85 irqhandlers[loop] = NULL;
86
87 /* Clear the IRQ/FIQ masks in the IOMD */
88 IOMD_WRITE_BYTE(IOMD_IRQMSKA, 0x00);
89 IOMD_WRITE_BYTE(IOMD_IRQMSKB, 0x00);
90
91 switch (IOMD_ID) {
92 case RPC600_IOMD_ID:
93 break;
94 case ARM7500_IOC_ID:
95 case ARM7500FE_IOC_ID:
96 IOMD_WRITE_BYTE(IOMD_IRQMSKC, 0x00);
97 IOMD_WRITE_BYTE(IOMD_IRQMSKD, 0x00);
98 break;
99 default:
100 printf("Unknown IOMD id (%d) found in irq_init()\n", IOMD_ID);
101 }
102
103 IOMD_WRITE_BYTE(IOMD_FIQMSK, 0x00);
104 IOMD_WRITE_BYTE(IOMD_DMAMSK, 0x00);
105
106 /*
107 * Setup the irqmasks for the different Interrupt Priority Levels
108 * We will start with no bits set and these will be updated as handlers
109 * are installed at different IPL's.
110 */
111 for (loop = 0; loop < NIPL; ++loop)
112 irqmasks[loop] = 0;
113
114 current_mask = 0x00000000;
115 disabled_mask = 0x00000000;
116 actual_mask = 0x00000000;
117
118 set_spl_masks();
119
120 /* Enable IRQ's and FIQ's */
121 enable_interrupts(I32_bit | F32_bit);
122 }
123
124
125 /*
126 * int irq_claim(int irq, irqhandler_t *handler)
127 *
128 * Enable an IRQ and install a handler for it.
129 */
130
131 int
irq_claim(int irq,irqhandler_t * handler)132 irq_claim(int irq, irqhandler_t *handler)
133 {
134 int level;
135 u_int oldirqstate;
136
137 #ifdef DIAGNOSTIC
138 /* Sanity check */
139 if (handler == NULL)
140 panic("NULL interrupt handler");
141 if (handler->ih_func == NULL)
142 panic("Interrupt handler does not have a function");
143 #endif /* DIAGNOSTIC */
144
145 /*
146 * IRQ_INSTRUCT indicates that we should get the irq number
147 * from the irq structure
148 */
149 if (irq == IRQ_INSTRUCT)
150 irq = handler->ih_num;
151
152 /* Make sure the irq number is valid */
153 if (irq < 0 || irq >= NIRQS)
154 return -1;
155
156 /* Make sure the level is valid */
157 if (handler->ih_level < 0 || handler->ih_level >= NIPL)
158 return -1;
159
160 oldirqstate = disable_interrupts(I32_bit);
161
162 /* Attach handler at top of chain */
163 handler->ih_next = irqhandlers[irq];
164 irqhandlers[irq] = handler;
165
166 /*
167 * Reset the flags for this handler.
168 * As the handler is now in the chain mark it as active.
169 */
170 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
171
172 /*
173 * Record the interrupt number for accounting.
174 * Done here as the accounting number may not be the same as the
175 * IRQ number though for the moment they are
176 */
177 handler->ih_num = irq;
178
179 #ifdef IRQSTATS
180 /* Get the interrupt name from the head of the list */
181 char *iptr = _intrnames + (irq * 14);
182 if (handler->ih_name) {
183 strlcpy(iptr, handler->ih_name, 14);
184 } else {
185 snprintf(iptr, 14, "irq %2d ", irq);
186 }
187 #endif /* IRQSTATS */
188
189 /*
190 * Update the irq masks.
191 * Find the lowest interrupt priority on the irq chain.
192 * Interrupt is allowable at priorities lower than this.
193 * If ih_level is out of range then don't bother to update
194 * the masks.
195 */
196 if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
197 irqhandler_t *ptr;
198
199 /*
200 * Find the lowest interrupt priority on the irq chain.
201 * Interrupt is allowable at priorities lower than this.
202 */
203 ptr = irqhandlers[irq];
204 if (ptr) {
205 int max_level;
206
207 level = ptr->ih_level - 1;
208 max_level = ptr->ih_level - 1;
209 while (ptr) {
210 if (ptr->ih_level - 1 < level)
211 level = ptr->ih_level - 1;
212 else if (ptr->ih_level - 1 > max_level)
213 max_level = ptr->ih_level - 1;
214 ptr = ptr->ih_next;
215 }
216 /* Clear out any levels that we cannot now allow */
217 while (max_level >=0 && max_level > level) {
218 irqmasks[max_level] &= ~(1 << irq);
219 --max_level;
220 }
221 while (level >= 0) {
222 irqmasks[level] |= (1 << irq);
223 --level;
224 }
225 }
226
227 #include "sl.h"
228 #include "ppp.h"
229 #if NSL > 0 || NPPP > 0
230 /* In the presence of SLIP or PPP, splimp > spltty. */
231 irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
232 #endif
233 }
234
235 enable_irq(irq);
236 set_spl_masks();
237 restore_interrupts(oldirqstate);
238
239 return 0;
240 }
241
242
243 /*
244 * int irq_release(int irq, irqhandler_t *handler)
245 *
246 * Disable an IRQ and remove a handler for it.
247 */
248
249 int
irq_release(int irq,irqhandler_t * handler)250 irq_release(int irq, irqhandler_t *handler)
251 {
252 int level;
253 irqhandler_t *irqhand;
254 irqhandler_t **prehand;
255
256 /*
257 * IRQ_INSTRUCT indicates that we should get the irq number
258 * from the irq structure
259 */
260 if (irq == IRQ_INSTRUCT)
261 irq = handler->ih_num;
262
263 /* Make sure the irq number is valid */
264 if (irq < 0 || irq >= NIRQS)
265 return(-1);
266
267 /* Locate the handler */
268 irqhand = irqhandlers[irq];
269 prehand = &irqhandlers[irq];
270
271 while (irqhand && handler != irqhand) {
272 prehand = &irqhand->ih_next;
273 irqhand = irqhand->ih_next;
274 }
275
276 /* Remove the handler if located */
277 if (irqhand)
278 *prehand = irqhand->ih_next;
279 else
280 return -1;
281
282 /* Now the handler has been removed from the chain mark is as inactive */
283 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
284
285 /* Make sure the head of the handler list is active */
286 if (irqhandlers[irq])
287 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
288
289 #ifdef IRQSTATS
290 /* Get the interrupt name from the head of the list */
291 char *iptr = _intrnames + (irq * 14);
292 if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
293 strlcpy(iptr, irqhandlers[irq]->ih_name, 14);
294 } else {
295 snprintf(iptr, 14, "irq %2d ", irq);
296 }
297 #endif /* IRQSTATS */
298
299 /*
300 * Update the irq masks.
301 * If ih_level is out of range then don't bother to update
302 * the masks.
303 */
304 if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
305 irqhandler_t *ptr;
306
307 /* Clean the bit from all the masks */
308 for (level = 0; level < NIPL; ++level)
309 irqmasks[level] &= ~(1 << irq);
310
311 /*
312 * Find the lowest interrupt priority on the irq chain.
313 * Interrupt is allowable at priorities lower than this.
314 */
315 ptr = irqhandlers[irq];
316 if (ptr) {
317 level = ptr->ih_level - 1;
318 while (ptr) {
319 if (ptr->ih_level - 1 < level)
320 level = ptr->ih_level - 1;
321 ptr = ptr->ih_next;
322 }
323 while (level >= 0) {
324 irqmasks[level] |= (1 << irq);
325 --level;
326 }
327 }
328 }
329
330 /*
331 * Disable the appropriate mask bit if there are no handlers left for
332 * this IRQ.
333 */
334 if (irqhandlers[irq] == NULL)
335 disable_irq(irq);
336
337 set_spl_masks();
338
339 return 0;
340 }
341
342
343 void *
intr_claim(int irq,int level,const char * name,int (* ih_func)(void *),void * ih_arg)344 intr_claim(int irq, int level, const char *name, int (*ih_func)(void *),
345 void *ih_arg)
346 {
347 irqhandler_t *ih;
348
349 ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
350 ih->ih_level = level;
351 ih->ih_name = name;
352 ih->ih_func = ih_func;
353 ih->ih_arg = ih_arg;
354 ih->ih_flags = 0;
355
356 if (irq_claim(irq, ih) != 0) {
357 kmem_free(ih, sizeof(*ih));
358 return NULL;
359 }
360 return ih;
361 }
362
363
364 int
intr_release(void * arg)365 intr_release(void *arg)
366 {
367 irqhandler_t *ih = (irqhandler_t *)arg;
368
369 if (irq_release(ih->ih_num, ih) == 0) {
370 kmem_free(ih, sizeof(*ih));
371 return 0 ;
372 }
373 return 1;
374 }
375
376 #if 0
377 u_int
378 disable_interrupts(u_int mask)
379 {
380 u_int cpsr;
381
382 cpsr = SetCPSR(mask, mask);
383 return cpsr;
384 }
385
386
387 u_int
388 restore_interrupts(u_int old_cpsr)
389 {
390 int mask = I32_bit | F32_bit;
391
392 return SetCPSR(mask, old_cpsr & mask);
393 }
394
395
396 u_int
397 enable_interrupts(u_int mask)
398 {
399
400 return SetCPSR(mask, 0);
401 }
402 #endif
403
404 /*
405 * void disable_irq(int irq)
406 *
407 * Disables a specific irq. The irq is removed from the master irq mask
408 */
409
410 void
disable_irq(int irq)411 disable_irq(int irq)
412 {
413 u_int oldirqstate;
414
415 oldirqstate = disable_interrupts(I32_bit);
416 current_mask &= ~(1 << irq);
417 irq_setmasks();
418 restore_interrupts(oldirqstate);
419 }
420
421
422 /*
423 * void enable_irq(int irq)
424 *
425 * Enables a specific irq. The irq is added to the master irq mask
426 * This routine should be used with caution. A handler should already
427 * be installed.
428 */
429
430 void
enable_irq(int irq)431 enable_irq(int irq)
432 {
433 u_int oldirqstate;
434
435 oldirqstate = disable_interrupts(I32_bit);
436 current_mask |= (1 << irq);
437 irq_setmasks();
438 restore_interrupts(oldirqstate);
439 }
440
441
442 /*
443 * void stray_irqhandler(u_int mask)
444 *
445 * Handler for stray interrupts. This gets called if a handler cannot be
446 * found for an interrupt.
447 */
448
449 void
stray_irqhandler(u_int mask)450 stray_irqhandler(u_int mask)
451 {
452 static u_int stray_irqs = 0;
453
454 if (++stray_irqs <= 8)
455 log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
456 stray_irqs >= 8 ? ": stopped logging" : "");
457 }
458