xref: /netbsd-src/sys/arch/mips/ingenic/ingenic_dme.c (revision d24f22365e75cacedd37bb734be2df732352a275)
1 /*	$NetBSD: ingenic_dme.c,v 1.4 2020/04/02 13:03:03 nisimura Exp $ */
2 
3 /*-
4  * Copyright (c) 2015 Michael Lorenz
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.4 2020/04/02 13:03:03 nisimura Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/intr.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
37 
38 #include <mips/ingenic/ingenic_var.h>
39 #include <mips/ingenic/ingenic_regs.h>
40 
41 #include <net/if.h>
42 #include <net/if_ether.h>
43 #include <net/if_media.h>
44 #include <dev/mii/miivar.h>
45 
46 #include <dev/ic/dm9000var.h>
47 #include <dev/ic/dm9000reg.h>
48 
49 #include "opt_ingenic.h"
50 
51 static int ingenic_dme_match(device_t, struct cfdata *, void *);
52 static void ingenic_dme_attach(device_t, device_t, void *);
53 static int ingenic_dme_intr(void *);
54 
55 CFATTACH_DECL_NEW(ingenic_dme, sizeof(struct dme_softc),
56     ingenic_dme_match, ingenic_dme_attach, NULL, NULL);
57 
58 #define GPIO_DME_INT		19
59 #define GPIO_DME_INT_MASK	(1 << GPIO_DME_INT)
60 
61 /* ARGSUSED */
62 static int
ingenic_dme_match(device_t parent,struct cfdata * match,void * aux)63 ingenic_dme_match(device_t parent, struct cfdata *match, void *aux)
64 {
65 	struct apbus_attach_args *aa = aux;
66 
67 	if (strcmp(aa->aa_name, "dme") != 0)
68 		return 0;
69 
70 	return 1;
71 }
72 
73 /* ARGSUSED */
74 static void
ingenic_dme_attach(device_t parent,device_t self,void * aux)75 ingenic_dme_attach(device_t parent, device_t self, void *aux)
76 {
77 	struct dme_softc *sc = device_private(self);
78 	struct apbus_attach_args *aa = aux;
79 	prop_data_t eaddrprop;
80 	void *ih;
81 	static uint8_t enaddr[ETHER_ADDR_LEN];
82 	int error;
83 
84 	sc->sc_dev = self;
85 
86 	sc->sc_iot = aa->aa_bst;
87 	sc->dme_io = JZ_DME_IO;
88 	sc->dme_data = JZ_DME_DATA;
89 	sc->sc_phy_initialized = 0;
90 
91 	if (aa->aa_addr == 0)
92 		aa->aa_addr = JZ_DME_BASE;
93 
94 	error = bus_space_map(aa->aa_bst, aa->aa_addr, 4, 0, &sc->sc_ioh);
95 	if (error) {
96 		aprint_error_dev(self,
97 		    "can't map registers for %s: %d\n", aa->aa_name, error);
98 		return;
99 	}
100 
101 	aprint_naive(": DM9000 Ethernet controller\n");
102 	aprint_normal(": DM9000 Ethernet controller\n");
103 
104 
105 	/* make sure the chip is powered up and not in reset */
106 	gpio_as_output(1, 25);
107 	gpio_set(1, 25, 1);
108 	gpio_as_output(5, 12);
109 	gpio_set(5, 12, 1);
110 
111 	/* setup pins to talk to the chip */
112 	gpio_as_dev0(1, 1);
113 	gpio_as_dev0(0, 0);
114 	gpio_as_dev0(0, 1);
115 	gpio_as_dev0(0, 2);
116 	gpio_as_dev0(0, 3);
117 	gpio_as_dev0(0, 4);
118 	gpio_as_dev0(0, 5);
119 	gpio_as_dev0(0, 6);
120 	gpio_as_dev0(0, 7);
121 
122 	gpio_as_dev0(0, 16);
123 	gpio_as_dev0(0, 17);
124 	gpio_as_dev0(0, 26);
125 
126 	/* DM9000 interrupt is on GPIO E pin 19 */
127 	gpio_as_intr_level(4, GPIO_DME_INT);
128 	ih = evbmips_intr_establish(13, ingenic_dme_intr, sc);
129 
130 		if (ih == NULL) {
131 		aprint_error_dev(self, "failed to establish interrupt %d\n",
132 		     13);
133 		goto fail;
134 	}
135 #if 0
136 	eaddrprop = prop_dictionary_get(device_properties(self), "mac-address");
137 
138 	if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) {
139 		memcpy(enaddr, prop_data_data_nocopy(eaddrprop),
140 			    ETHER_ADDR_LEN);
141 		aprint_debug_dev(self, "got MAC address!\n");
142 	} else {
143 		/*
144 		 * XXX
145 		 * if we don't get the MAC address as a property we hope like
146 		 * hell that uboot programmed it into the network chip
147 		 */
148 		aprint_error_dev(self, "reading MAC address from chip\n");
149 		dme_read_c(sc, DM9000_PAB0, enaddr, 6);
150 	}
151 #else
152 	(void)eaddrprop;
153 	/*
154 	 * dme_attach checks dictionary, then previous setting, then roll
155 	 * a dice to make random MAC address
156 	 */
157 #endif
158 	dme_attach(sc, enaddr);
159 	return;
160 fail:
161 	if (ih) {
162 		evbmips_intr_disestablish(ih);
163 	}
164 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, 4);
165 }
166 
167 static int
ingenic_dme_intr(void * arg)168 ingenic_dme_intr(void *arg)
169 {
170 	uint32_t reg;
171 	int ret = 0;
172 
173 	/* see if it's us */
174 	reg = readreg(JZ_GPIO_E_BASE + JZ_GPIO_FLAG);
175 	if (reg & GPIO_DME_INT_MASK) {
176 		/* yes, it's ours, handle it... */
177 		ret = dme_intr(arg);
178 		/* ... and clear it */
179 		writereg(JZ_GPIO_E_BASE + JZ_GPIO_FLAGC, GPIO_DME_INT_MASK);
180 	}
181 	return ret;
182 }
183