xref: /netbsd-src/sys/arch/arm/imx/imx51_esdhc.c (revision a50c06709e9b38df84c2255a195b44271ec23160)
1 /*	$NetBSD: imx51_esdhc.c,v 1.4 2018/06/06 01:49:07 maya Exp $ */
2 
3 /*-
4  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
5  * Written by Hiroyuki Bessho for Genetec Corporation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above
13  *    copyright notice, this list of conditions and the following
14  *    disclaimer in the documentation and/or other materials provided
15  *    with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS''
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
20  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS
21  * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
27  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: imx51_esdhc.c,v 1.4 2018/06/06 01:49:07 maya Exp $");
34 
35 #include "opt_imx.h"
36 
37 #include <sys/param.h>
38 #include <sys/device.h>
39 #include <sys/systm.h>
40 #include <sys/bus.h>
41 #include <sys/pmf.h>
42 
43 #include <machine/intr.h>
44 
45 #include <dev/sdmmc/sdhcvar.h>
46 #include <dev/sdmmc/sdmmcvar.h>
47 
48 #include <arm/imx/imx51reg.h>
49 #include <arm/imx/imx51var.h>
50 #include <arm/imx/imx51_ccmvar.h>
51 
52 struct sdhc_axi_softc {
53 	struct sdhc_softc  sc_sdhc;
54 	/* we have only one slot */
55 	struct sdhc_host *sc_hosts[1];
56 
57 	void *sc_ih;
58 };
59 
60 static int sdhc_match(device_t, cfdata_t, void *);
61 static void sdhc_attach(device_t, device_t, void *);
62 
63 CFATTACH_DECL_NEW(sdhc_axi, sizeof(struct sdhc_axi_softc),
64     sdhc_match, sdhc_attach, NULL, NULL);
65 
66 static int
sdhc_match(device_t parent,cfdata_t cf,void * aux)67 sdhc_match(device_t parent, cfdata_t cf, void *aux)
68 {
69 
70 	struct axi_attach_args *aa = aux;
71 
72 	switch (aa->aa_addr) {
73 	case ESDHC1_BASE:
74 	case ESDHC2_BASE:
75 	case ESDHC3_BASE:
76 	case ESDHC4_BASE:
77 		return 1;
78 	}
79 
80 	return 0;
81 }
82 
83 static void
sdhc_attach(device_t parent,device_t self,void * aux)84 sdhc_attach(device_t parent, device_t self, void *aux)
85 {
86 	struct sdhc_axi_softc *sc = device_private(self);
87 	struct axi_attach_args *aa = aux;
88 	bus_space_tag_t iot = aa->aa_iot;
89 	bus_space_handle_t ioh;
90 	u_int perclk = 0;
91 
92 	sc->sc_sdhc.sc_dev = self;
93 
94 	sc->sc_sdhc.sc_dmat = aa->aa_dmat;
95 
96 	if (bus_space_map(iot, aa->aa_addr, ESDHC_SIZE, 0, &ioh)) {
97 		aprint_error_dev(self, "can't map\n");
98 		return;
99 	}
100 
101 	aprint_normal(": SD/MMC host controller\n");
102 	aprint_naive("\n");
103 	sc->sc_sdhc.sc_host = sc->sc_hosts;
104 	/* base clock frequency in kHz */
105 	switch (aa->aa_addr) {
106 	case ESDHC1_BASE:
107 		perclk = imx51_get_clock(IMX51CLK_ESDHC1_CLK_ROOT);
108 		break;
109 	case ESDHC2_BASE:
110 		perclk = imx51_get_clock(IMX51CLK_ESDHC2_CLK_ROOT);
111 		break;
112 	case ESDHC3_BASE:
113 		perclk = imx51_get_clock(IMX51CLK_ESDHC3_CLK_ROOT);
114 		break;
115 	case ESDHC4_BASE:
116 		perclk = imx51_get_clock(IMX51CLK_ESDHC4_CLK_ROOT);
117 		break;
118 	}
119 	sc->sc_sdhc.sc_clkbase = perclk / 1000;
120 	sc->sc_sdhc.sc_flags |= SDHC_FLAG_USE_DMA;
121 	sc->sc_sdhc.sc_flags |= SDHC_FLAG_HAVE_DVS |
122 		SDHC_FLAG_NO_PWR0 |
123 		SDHC_FLAG_32BIT_ACCESS |
124 		SDHC_FLAG_ENHANCED;
125 
126 	sc->sc_ih = intr_establish(aa->aa_irq, IPL_SDMMC, IST_LEVEL,
127 	    sdhc_intr, &sc->sc_sdhc);
128 
129 	if (sc->sc_ih == NULL) {
130 		aprint_error_dev(self, "can't establish interrupt\n");
131 		return;
132 	}
133 
134 	if (sdhc_host_found(&sc->sc_sdhc, iot, ioh, ESDHC_SIZE)) {
135 		aprint_error_dev(self, "can't initialize host\n");
136 		return;
137 	}
138 
139 	if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
140 		sdhc_shutdown)) {
141 		aprint_error_dev(self,
142 		    "can't establish power hook\n");
143 	}
144 }
145