1 /* $NetBSD: if_tlp_pci.c,v 1.131 2023/12/20 04:32:30 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center; and Charles M. Hannum.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
35 * Ethernet controller family driver.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.131 2023/12/20 04:32:30 thorpej Exp $");
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/mbuf.h>
44 #include <sys/kmem.h>
45 #include <sys/kernel.h>
46 #include <sys/socket.h>
47 #include <sys/ioctl.h>
48 #include <sys/errno.h>
49 #include <sys/device.h>
50
51 #include <machine/endian.h>
52
53 #include <net/if.h>
54 #include <net/if_dl.h>
55 #include <net/if_media.h>
56 #include <net/if_ether.h>
57
58 #include <sys/bus.h>
59 #include <sys/intr.h>
60
61 #include <dev/mii/miivar.h>
62 #include <dev/mii/mii_bitbang.h>
63
64 #include <dev/ic/tulipreg.h>
65 #include <dev/ic/tulipvar.h>
66
67 #include <dev/pci/pcivar.h>
68 #include <dev/pci/pcireg.h>
69 #include <dev/pci/pcidevs.h>
70
71 /*
72 * PCI configuration space registers used by the Tulip.
73 */
74 #define TULIP_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
75 #define TULIP_PCI_MMBA PCI_BAR(1) /* memory mapped base */
76 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
77
78 #define CFDA_SLEEP 0x80000000 /* sleep mode */
79 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
80
81 struct tulip_pci_softc {
82 struct tulip_softc sc_tulip; /* real Tulip softc */
83
84 /* PCI-specific goo. */
85 void *sc_ih; /* interrupt handle */
86 bus_size_t sc_mapsize;
87
88 pci_chipset_tag_t sc_pc; /* our PCI chipset */
89 pcitag_t sc_pcitag; /* our PCI tag */
90
91 int sc_flags; /* flags; see below */
92
93 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
94 LIST_ENTRY(tulip_pci_softc) sc_intrq;
95
96 /* Our {ROM,interrupt} master. */
97 struct tulip_pci_softc *sc_master;
98 };
99
100 /* sc_flags */
101 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
102 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
103 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
104 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
105
106 static int tlp_pci_match(device_t, cfdata_t, void *);
107 static void tlp_pci_attach(device_t, device_t, void *);
108 static int tlp_pci_detach(device_t, int);
109
110 CFATTACH_DECL3_NEW(tlp_pci, sizeof(struct tulip_pci_softc),
111 tlp_pci_match, tlp_pci_attach, tlp_pci_detach, NULL, NULL, NULL,
112 DVF_DETACH_SHUTDOWN);
113
114 static const struct device_compatible_entry compat_data[] = {
115 { .id = PCI_ID_CODE(PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040),
116 .value = TULIP_CHIP_21040 },
117
118 { .id = PCI_ID_CODE(PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041),
119 .value = TULIP_CHIP_21041 },
120
121 { .id = PCI_ID_CODE(PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140),
122 .value = TULIP_CHIP_21140 },
123
124 { .id = PCI_ID_CODE(PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142),
125 .value = TULIP_CHIP_21142 },
126
127
128
129 { .id = PCI_ID_CODE(PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168),
130 .value = TULIP_CHIP_82C168 },
131
132 /*
133 * Note: This is like a MX98725 with Wake-On-LAN and a
134 * 128-bit multicast hash table.
135 */
136 { .id = PCI_ID_CODE(PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115),
137 .value = TULIP_CHIP_82C115 },
138
139
140
141 { .id = PCI_ID_CODE(PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713),
142 .value = TULIP_CHIP_MX98713 },
143
144 { .id = PCI_ID_CODE(PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5),
145 .value = TULIP_CHIP_MX98715 },
146
147 { .id = PCI_ID_CODE(PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX),
148 .value = TULIP_CHIP_MX98713 },
149
150
151
152 { .id = PCI_ID_CODE(PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F),
153 .value = TULIP_CHIP_WB89C840F },
154
155 { .id = PCI_ID_CODE(PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX),
156 .value = TULIP_CHIP_WB89C840F },
157
158
159
160 { .id = PCI_ID_CODE(PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102),
161 .value = TULIP_CHIP_DM9102 },
162
163
164
165 { .id = PCI_ID_CODE(PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981),
166 .value = TULIP_CHIP_AL981 },
167
168 { .id = PCI_ID_CODE(PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983),
169 .value = TULIP_CHIP_AN985 },
170
171 { .id = PCI_ID_CODE(PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511),
172 .value = TULIP_CHIP_AN985 },
173
174 { .id = PCI_ID_CODE(PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513),
175 .value = TULIP_CHIP_AN985 },
176
177 { .id = PCI_ID_CODE(PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242),
178 .value = TULIP_CHIP_AN985 },
179
180 { .id = PCI_ID_CODE(PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB),
181 .value = TULIP_CHIP_AN985 },
182
183
184
185 { .id = PCI_ID_CODE(PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A),
186 .value = TULIP_CHIP_AX88140 },
187
188
189
190 { .id = PCI_ID_CODE(PCI_VENDOR_CONEXANT,
191 PCI_PRODUCT_CONEXANT_LANFINITY),
192 .value = TULIP_CHIP_RS7112 },
193
194
195
196 PCI_COMPAT_EOL
197 };
198
199 struct tlp_pci_quirks {
200 void (*tpq_func)(struct tulip_pci_softc *,
201 const uint8_t *);
202 uint8_t tpq_oui[3];
203 };
204
205 static void tlp_pci_dec_quirks(struct tulip_pci_softc *,
206 const uint8_t *);
207
208 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *,
209 const uint8_t *);
210 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *,
211 const uint8_t *);
212 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *,
213 const uint8_t *);
214 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *,
215 const uint8_t *);
216
217 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *,
218 const uint8_t *);
219 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *,
220 const uint8_t *);
221 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *,
222 const uint8_t *);
223 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *,
224 const uint8_t *);
225 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *,
226 const uint8_t *);
227
228 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *,
229 const uint8_t *);
230
231 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
232 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
233 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
234 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
235 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
236 { NULL, { 0, 0, 0 } }
237 };
238
239 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
240 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
241 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
242 { NULL, { 0, 0, 0 } }
243 };
244
245 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *,
246 const uint8_t *);
247 static void tlp_pci_e100_quirks(struct tulip_pci_softc *,
248 const uint8_t *);
249 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *,
250 const uint8_t *);
251 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *,
252 const uint8_t *);
253 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *,
254 const uint8_t *);
255
256 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
257 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
258 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
259 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } },
260 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
261 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } },
262 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } },
263 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } },
264 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } },
265 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } },
266 { NULL, { 0, 0, 0 } }
267 };
268
269 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
270 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
271 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
272 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
273 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } },
274 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } },
275 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } },
276 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } },
277 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } },
278 { NULL, { 0, 0, 0 } }
279 };
280
281 static int tlp_pci_shared_intr(void *);
282
283 static void
tlp_pci_get_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr,const struct tlp_pci_quirks * tpq)284 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr,
285 const struct tlp_pci_quirks *tpq)
286 {
287
288 for (; tpq->tpq_func != NULL; tpq++) {
289 if (tpq->tpq_oui[0] == enaddr[0] &&
290 tpq->tpq_oui[1] == enaddr[1] &&
291 tpq->tpq_oui[2] == enaddr[2]) {
292 (*tpq->tpq_func)(psc, enaddr);
293 return;
294 }
295 }
296 }
297
298 static void
tlp_pci_check_slaved(struct tulip_pci_softc * psc,int shared,int slaved)299 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved)
300 {
301 extern struct cfdriver tlp_cd;
302 struct tulip_pci_softc *cur, *best = NULL;
303 struct tulip_softc *sc = &psc->sc_tulip;
304 int i;
305
306 /*
307 * First of all, find the lowest pcidev numbered device on our
308 * bus marked as shared. That should be our master.
309 */
310 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
311 if ((cur = device_lookup_private(&tlp_cd, i)) == NULL)
312 continue;
313 if (device_parent(cur->sc_tulip.sc_dev) !=
314 device_parent(sc->sc_dev))
315 continue;
316 if ((cur->sc_flags & shared) == 0)
317 continue;
318 if (cur == psc)
319 continue;
320 if (best == NULL ||
321 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
322 best = cur;
323 }
324
325 if (best != NULL) {
326 psc->sc_master = best;
327 psc->sc_flags |= (shared | slaved);
328 }
329 }
330
331 static int
tlp_pci_match(device_t parent,cfdata_t match,void * aux)332 tlp_pci_match(device_t parent, cfdata_t match, void *aux)
333 {
334 struct pci_attach_args *pa = aux;
335
336 if (pci_compatible_match(pa, compat_data)) {
337 /* Don't match lmc cards */
338 const pcireg_t subsys = pci_conf_read(pa->pa_pc, pa->pa_tag,
339 PCI_SUBSYS_ID_REG);
340 if (PCI_VENDOR(subsys) == PCI_VENDOR_LMC) {
341 return 0;
342 }
343 return 10; /* beat if_de.c */
344 }
345 return 0;
346 }
347
348 static void
tlp_pci_attach(device_t parent,device_t self,void * aux)349 tlp_pci_attach(device_t parent, device_t self, void *aux)
350 {
351 struct tulip_pci_softc *psc = device_private(self);
352 struct tulip_softc *sc = &psc->sc_tulip;
353 struct pci_attach_args *pa = aux;
354 pci_chipset_tag_t pc = pa->pa_pc;
355 pci_intr_handle_t ih;
356 const char *intrstr = NULL;
357 bus_space_tag_t iot, memt;
358 bus_space_handle_t ioh, memh;
359 int ioh_valid, memh_valid, i, j;
360 const struct device_compatible_entry *dce;
361 prop_data_t ea;
362 uint8_t enaddr[ETHER_ADDR_LEN];
363 uint32_t val = 0;
364 pcireg_t reg;
365 int error;
366 bus_size_t iosize = 0, memsize = 0;
367 char intrbuf[PCI_INTRSTR_LEN];
368
369 sc->sc_dev = self;
370 sc->sc_devno = pa->pa_device;
371 psc->sc_pc = pa->pa_pc;
372 psc->sc_pcitag = pa->pa_tag;
373
374 LIST_INIT(&psc->sc_intrslaves);
375
376 dce = pci_compatible_lookup(pa, compat_data);
377 KASSERT(dce != NULL);
378 sc->sc_chip = (tulip_chip_t)dce->value;
379
380 /*
381 * By default, Tulip registers are 8 bytes long (4 bytes
382 * followed by a 4 byte pad).
383 */
384 sc->sc_regshift = 3;
385
386 /*
387 * No power management hooks.
388 * XXX Maybe we should add some!
389 */
390 sc->sc_flags |= TULIPF_ENABLED;
391
392 /*
393 * Get revision info, and set some chip-specific variables.
394 */
395 sc->sc_rev = PCI_REVISION(pa->pa_class);
396 switch (sc->sc_chip) {
397 case TULIP_CHIP_21140:
398 if (sc->sc_rev >= 0x20)
399 sc->sc_chip = TULIP_CHIP_21140A;
400 break;
401
402 case TULIP_CHIP_21142:
403 if (sc->sc_rev >= 0x20)
404 sc->sc_chip = TULIP_CHIP_21143;
405 break;
406
407 case TULIP_CHIP_82C168:
408 if (sc->sc_rev >= 0x20)
409 sc->sc_chip = TULIP_CHIP_82C169;
410 break;
411
412 case TULIP_CHIP_MX98713:
413 if (sc->sc_rev >= 0x10)
414 sc->sc_chip = TULIP_CHIP_MX98713A;
415 break;
416
417 case TULIP_CHIP_MX98715:
418 if (sc->sc_rev >= 0x20)
419 sc->sc_chip = TULIP_CHIP_MX98715A;
420 if (sc->sc_rev >= 0x25)
421 sc->sc_chip = TULIP_CHIP_MX98715AEC_X;
422 if (sc->sc_rev >= 0x30)
423 sc->sc_chip = TULIP_CHIP_MX98725;
424 break;
425
426 case TULIP_CHIP_WB89C840F:
427 sc->sc_regshift = 2;
428 break;
429
430 case TULIP_CHIP_AN985:
431 /*
432 * The AN983 and AN985 are very similar, and are
433 * differentiated by a "signature" register that
434 * is like, but not identical, to a PCI ID register.
435 */
436 reg = pci_conf_read(pc, pa->pa_tag, 0x80);
437 switch (reg) {
438 case 0x09811317:
439 sc->sc_chip = TULIP_CHIP_AN985;
440 break;
441
442 case 0x09851317:
443 sc->sc_chip = TULIP_CHIP_AN983;
444 break;
445
446 default:
447 /* Unknown -- use default. */
448 break;
449 }
450 break;
451
452 case TULIP_CHIP_AX88140:
453 if (sc->sc_rev >= 0x10)
454 sc->sc_chip = TULIP_CHIP_AX88141;
455 break;
456
457 case TULIP_CHIP_DM9102:
458 if (sc->sc_rev >= 0x30)
459 sc->sc_chip = TULIP_CHIP_DM9102A;
460 break;
461
462 default:
463 /* Nothing. */
464 break;
465 }
466
467 aprint_normal(": %s Ethernet, pass %d.%d\n",
468 tlp_chip_name(sc->sc_chip),
469 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
470
471 switch (sc->sc_chip) {
472 case TULIP_CHIP_21040:
473 if (sc->sc_rev < 0x20) {
474 aprint_normal_dev(self,
475 "21040 must be at least pass 2.0\n");
476 return;
477 }
478 break;
479
480 case TULIP_CHIP_21140:
481 if (sc->sc_rev < 0x11) {
482 aprint_normal_dev(self,
483 "21140 must be at least pass 1.1\n");
484 return;
485 }
486 break;
487
488 default:
489 /* Nothing. */
490 break;
491 }
492
493 /*
494 * Check to see if the device is in power-save mode, and
495 * being it out if necessary.
496 */
497 switch (sc->sc_chip) {
498 case TULIP_CHIP_21140:
499 case TULIP_CHIP_21140A:
500 case TULIP_CHIP_21142:
501 case TULIP_CHIP_21143:
502 case TULIP_CHIP_MX98713A:
503 case TULIP_CHIP_MX98715:
504 case TULIP_CHIP_MX98715A:
505 case TULIP_CHIP_MX98715AEC_X:
506 case TULIP_CHIP_MX98725:
507 case TULIP_CHIP_DM9102:
508 case TULIP_CHIP_DM9102A:
509 case TULIP_CHIP_AX88140:
510 case TULIP_CHIP_AX88141:
511 case TULIP_CHIP_RS7112:
512 /*
513 * Clear the "sleep mode" bit in the CFDA register.
514 */
515 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
516 if (reg & (CFDA_SLEEP | CFDA_SNOOZE))
517 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
518 reg & ~(CFDA_SLEEP | CFDA_SNOOZE));
519 break;
520
521 default:
522 /* Nothing. */
523 break;
524 }
525
526 /* power up chip */
527 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
528 NULL)) && error != EOPNOTSUPP) {
529 aprint_error_dev(self, "cannot activate %d\n", error);
530 return;
531 }
532
533 /*
534 * Map the device.
535 */
536
537 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
538 PCI_MAPREG_TYPE_IO, 0,
539 &iot, &ioh, NULL, &iosize) == 0);
540 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
541 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
542 &memt, &memh, NULL, &memsize) == 0);
543 if (memh_valid) {
544 sc->sc_st = memt;
545 sc->sc_sh = memh;
546 psc->sc_mapsize = memsize;
547 if (ioh_valid) {
548 bus_space_unmap(iot, ioh, iosize);
549 ioh_valid = 0;
550 }
551 } else if (ioh_valid) {
552 sc->sc_st = iot;
553 sc->sc_sh = ioh;
554 psc->sc_mapsize = iosize;
555 if (memh_valid) {
556 bus_space_unmap(memt, memh, memsize);
557 memh_valid = 0;
558 }
559 } else {
560 aprint_error_dev(self, "unable to map device registers\n");
561 goto fail;
562 }
563
564 sc->sc_dmat = pa->pa_dmat;
565
566 /*
567 * Make sure bus mastering is enabled.
568 */
569 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
570 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
571 PCI_COMMAND_MASTER_ENABLE);
572
573 /*
574 * Get the cacheline size.
575 */
576 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
577 PCI_BHLC_REG));
578
579 /*
580 * Get PCI data moving command info.
581 */
582 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
583 sc->sc_flags |= TULIPF_MRL;
584 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
585 sc->sc_flags |= TULIPF_MRM;
586 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
587 sc->sc_flags |= TULIPF_MWI;
588
589 /*
590 * Read the contents of the Ethernet Address ROM/SROM.
591 */
592 switch (sc->sc_chip) {
593 case TULIP_CHIP_21040:
594 sc->sc_srom_addrbits = 6;
595 sc->sc_srom = kmem_alloc(TULIP_ROM_SIZE(6), KM_SLEEP);
596 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
597 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
598 for (j = 0; j < 10000; j++) {
599 val = TULIP_READ(sc, CSR_MIIROM);
600 if ((val & MIIROM_DN) == 0)
601 break;
602 }
603 sc->sc_srom[i] = val & MIIROM_DATA;
604 }
605 break;
606
607 case TULIP_CHIP_82C168:
608 case TULIP_CHIP_82C169:
609 {
610 sc->sc_srom_addrbits = 2;
611 sc->sc_srom = kmem_zalloc(TULIP_ROM_SIZE(2), KM_SLEEP);
612
613 /*
614 * The Lite-On PNIC stores the Ethernet address in
615 * the first 3 words of the EEPROM. EEPROM access
616 * is not like the other Tulip chips.
617 */
618 for (i = 0; i < 6; i += 2) {
619 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
620 PNIC_SROMCTL_READ | (i >> 1));
621 for (j = 0; j < 500; j++) {
622 delay(2);
623 val = TULIP_READ(sc, CSR_MIIROM);
624 if ((val & PNIC_MIIROM_BUSY) == 0)
625 break;
626 }
627 if (val & PNIC_MIIROM_BUSY) {
628 aprint_error_dev(self, "EEPROM timed out\n");
629 goto fail;
630 }
631 val &= PNIC_MIIROM_DATA;
632 sc->sc_srom[i] = val >> 8;
633 sc->sc_srom[i + 1] = val & 0xff;
634 }
635 break;
636 }
637
638 default:
639 /*
640 * XXX This isn't quite the right way to do this; we should
641 * XXX be attempting to fetch the mac-addr property in the
642 * XXX bus-agnostic part of the driver independently. But
643 * XXX that requires a larger change in the SROM handling
644 * XXX logic, and for now we can at least remove a machine-
645 * XXX dependent wart from the PCI front-end.
646 */
647 ea = prop_dictionary_get(device_properties(self),
648 "mac-address");
649 if (ea != NULL) {
650 extern int tlp_srom_debug;
651 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA);
652 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN);
653
654 memcpy(enaddr, prop_data_value(ea),
655 ETHER_ADDR_LEN);
656
657 sc->sc_srom_addrbits = 6;
658 sc->sc_srom = kmem_zalloc(TULIP_ROM_SIZE(6), KM_SLEEP);
659 memcpy(sc->sc_srom, enaddr, sizeof(enaddr));
660 if (tlp_srom_debug) {
661 aprint_normal("SROM CONTENTS:");
662 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
663 if ((i % 8) == 0)
664 aprint_normal("\n\t");
665 aprint_normal("0x%02x ",
666 sc->sc_srom[i]);
667 }
668 aprint_normal("\n");
669 }
670 break;
671 }
672
673 /* Check for a slaved ROM on a multi-port board. */
674 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
675 TULIP_PCI_SLAVEROM);
676 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
677 sc->sc_srom_addrbits =
678 psc->sc_master->sc_tulip.sc_srom_addrbits;
679 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom;
680 enaddr[5] +=
681 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
682 }
683 else if (tlp_read_srom(sc) == 0)
684 goto cant_cope;
685 break;
686 }
687
688 /*
689 * Deal with chip/board quirks. This includes setting up
690 * the mediasw, and extracting the Ethernet address from
691 * the rombuf.
692 */
693 switch (sc->sc_chip) {
694 case TULIP_CHIP_21040:
695 /*
696 * Parse the Ethernet Address ROM.
697 */
698 if (tlp_parse_old_srom(sc, enaddr) == 0)
699 goto cant_cope;
700
701
702 /*
703 * All 21040 boards start out with the same
704 * media switch.
705 */
706 sc->sc_mediasw = &tlp_21040_mediasw;
707
708 /*
709 * Deal with any quirks this board might have.
710 */
711 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
712 break;
713
714 case TULIP_CHIP_21041:
715 /* Check for new format SROM. */
716 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
717 /*
718 * Not an ISV SROM; try the old DEC Ethernet Address
719 * ROM format.
720 */
721 if (tlp_parse_old_srom(sc, enaddr) == 0)
722 goto cant_cope;
723 }
724
725 /*
726 * All 21041 boards use the same media switch; they all
727 * work basically the same! Yippee!
728 */
729 sc->sc_mediasw = &tlp_21041_mediasw;
730
731 /*
732 * Deal with any quirks this board might have.
733 */
734 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
735 break;
736
737 case TULIP_CHIP_21140:
738 case TULIP_CHIP_21140A:
739 /* Check for new format SROM. */
740 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
741 /*
742 * Not an ISV SROM; try the old DEC Ethernet Address
743 * ROM format.
744 */
745 if (tlp_parse_old_srom(sc, enaddr) == 0)
746 goto cant_cope;
747 } else {
748 /*
749 * We start out with the 2114x ISV media switch.
750 * When we search for quirks, we may change to
751 * a different switch.
752 */
753 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
754 }
755
756 /*
757 * Deal with any quirks this board might have.
758 */
759 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
760
761 /*
762 * Bail out now if we can't deal with this board.
763 */
764 if (sc->sc_mediasw == NULL)
765 goto cant_cope;
766 break;
767
768 case TULIP_CHIP_21142:
769 case TULIP_CHIP_21143:
770 /* Check for new format SROM. */
771 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
772 /*
773 * Not an ISV SROM; try the old DEC Ethernet Address
774 * ROM format.
775 */
776 if (tlp_parse_old_srom(sc, enaddr) == 0) {
777 /*
778 * One last try: just copy the address
779 * from offset 20 and try to look
780 * up quirks.
781 */
782 memcpy(enaddr, &sc->sc_srom[20],
783 ETHER_ADDR_LEN);
784 }
785 } else {
786 /*
787 * We start out with the 2114x ISV media switch.
788 * When we search for quirks, we may change to
789 * a different switch.
790 */
791 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
792 }
793
794 /*
795 * Deal with any quirks this board might have.
796 */
797 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
798
799 /*
800 * Bail out now if we can't deal with this board.
801 */
802 if (sc->sc_mediasw == NULL)
803 goto cant_cope;
804 break;
805
806 case TULIP_CHIP_82C168:
807 case TULIP_CHIP_82C169:
808 /*
809 * Lite-On PNIC's Ethernet address is the first 6
810 * bytes of its EEPROM.
811 */
812 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
813
814 /*
815 * Lite-On PNICs always use the same mediasw; we
816 * select MII vs. internal NWAY automatically.
817 */
818 sc->sc_mediasw = &tlp_pnic_mediasw;
819 break;
820
821 case TULIP_CHIP_MX98713:
822 /*
823 * The Macronix MX98713 has an MII and GPIO, but no
824 * internal Nway block. This chip is basically a
825 * perfect 21140A clone, with the exception of the
826 * a magic register frobbing in order to make the
827 * interface function.
828 */
829 if (tlp_isv_srom_enaddr(sc, enaddr)) {
830 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
831 break;
832 }
833 /* FALLTHROUGH */
834
835 case TULIP_CHIP_82C115:
836 /*
837 * Yippee! The Lite-On 82C115 is a clone of
838 * the MX98725 (the data sheet even says `MXIC'
839 * on it)! Imagine that, a clone of a clone.
840 *
841 * The differences are really minimal:
842 *
843 * - Wake-On-LAN support
844 * - 128-bit multicast hash table, rather than
845 * the standard 512-bit hash table
846 */
847 /* FALLTHROUGH */
848
849 case TULIP_CHIP_MX98713A:
850 case TULIP_CHIP_MX98715A:
851 case TULIP_CHIP_MX98715AEC_X:
852 case TULIP_CHIP_MX98725:
853 /*
854 * The MX98713A has an MII as well as an internal Nway block,
855 * but no GPIO. The MX98715 and MX98725 have an internal
856 * Nway block only.
857 *
858 * The internal Nway block, unlike the Lite-On PNIC's, does
859 * just that - performs Nway. Once autonegotiation completes,
860 * we must program the GPR media information into the chip.
861 *
862 * The byte offset of the Ethernet address is stored at
863 * offset 0x70.
864 */
865 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
866 sc->sc_mediasw = &tlp_pmac_mediasw;
867 break;
868
869 case TULIP_CHIP_WB89C840F:
870 /*
871 * Winbond 89C840F's Ethernet address is the first
872 * 6 bytes of its EEPROM.
873 */
874 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
875
876 /*
877 * Winbond 89C840F has an MII attached to the SIO.
878 */
879 sc->sc_mediasw = &tlp_sio_mii_mediasw;
880 break;
881
882 case TULIP_CHIP_AL981:
883 /*
884 * The ADMtek AL981's Ethernet address is located
885 * at offset 8 of its EEPROM.
886 */
887 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
888
889 /*
890 * ADMtek AL981 has a built-in PHY accessed through
891 * special registers.
892 */
893 sc->sc_mediasw = &tlp_al981_mediasw;
894 break;
895
896 case TULIP_CHIP_AN983:
897 case TULIP_CHIP_AN985:
898 /*
899 * The ADMtek AN985's Ethernet address is located
900 * at offset 8 of its EEPROM.
901 */
902 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
903
904 /*
905 * The ADMtek AN985 can be configured in Single-Chip
906 * mode or MAC-only mode. Single-Chip uses the built-in
907 * PHY, MAC-only has an external PHY (usually HomePNA).
908 * The selection is based on an EEPROM setting, and both
909 * PHYs are accessed via MII attached to SIO.
910 *
911 * The AN985 "ghosts" the internal PHY onto all
912 * MII addresses, so we have to use a media init
913 * routine that limits the search.
914 * XXX How does this work with MAC-only mode?
915 */
916 sc->sc_mediasw = &tlp_an985_mediasw;
917 break;
918
919 case TULIP_CHIP_DM9102:
920 case TULIP_CHIP_DM9102A:
921 /*
922 * Some boards with the Davicom chip have an ISV
923 * SROM (mostly DM9102A boards -- trying to describe
924 * the HomePNA PHY, probably) although the data in
925 * them is generally wrong. Check for ISV format
926 * and grab the Ethernet address that way, and if
927 * that fails, fall back on grabbing it from an
928 * observed offset of 20 (which is where it would
929 * be in an ISV SROM anyhow, tho ISV can cope with
930 * multi-port boards).
931 */
932 if (!tlp_isv_srom_enaddr(sc, enaddr)) {
933
934 prop_data_t eaddrprop;
935
936 eaddrprop = prop_dictionary_get(
937 device_properties(self), "mac-address");
938
939 if (eaddrprop != NULL
940 && prop_data_size(eaddrprop) == ETHER_ADDR_LEN)
941 memcpy(enaddr,
942 prop_data_value(eaddrprop),
943 ETHER_ADDR_LEN);
944 else
945 memcpy(enaddr, &sc->sc_srom[20],
946 ETHER_ADDR_LEN);
947 }
948
949 /*
950 * Davicom chips all have an internal MII interface
951 * and a built-in PHY. DM9102A also has a an external
952 * MII interface, usually with a HomePNA PHY attached
953 * to it.
954 */
955 sc->sc_mediasw = &tlp_dm9102_mediasw;
956 break;
957
958 case TULIP_CHIP_AX88140:
959 case TULIP_CHIP_AX88141:
960 /*
961 * ASIX AX88140/AX88141 Ethernet Address is located at offset
962 * 20 of the SROM.
963 */
964 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN);
965
966 /*
967 * ASIX AX88140A/AX88141 chip can have a built-in PHY or
968 * an external MII interface.
969 */
970 sc->sc_mediasw = &tlp_asix_mediasw;
971 break;
972
973 case TULIP_CHIP_RS7112:
974 /*
975 * RS7112 Ethernet Address is located of offset 0x19a
976 * of the SROM
977 */
978 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN);
979
980 /* RS7112 chip has a PHY at MII address 1 */
981 sc->sc_mediasw = &tlp_rs7112_mediasw;
982 break;
983
984 default:
985 cant_cope:
986 aprint_error_dev(self, "sorry, unable to handle your board\n");
987 goto fail;
988 }
989
990 /*
991 * Handle shared interrupts.
992 */
993 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
994 if (psc->sc_master)
995 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
996 else {
997 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
998 TULIP_PCI_SLAVEINTR);
999 if (psc->sc_master == NULL)
1000 psc->sc_master = psc;
1001 }
1002 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
1003 psc, sc_intrq);
1004 }
1005
1006 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
1007 aprint_normal_dev(self, "sharing interrupt with %s\n",
1008 device_xname(psc->sc_master->sc_tulip.sc_dev));
1009 } else {
1010 /*
1011 * Map and establish our interrupt.
1012 */
1013 if (pci_intr_map(pa, &ih)) {
1014 aprint_error_dev(self, "unable to map interrupt\n");
1015 goto fail;
1016 }
1017 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
1018 psc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_NET,
1019 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
1020 tlp_pci_shared_intr : tlp_intr, sc, device_xname(self));
1021 if (psc->sc_ih == NULL) {
1022 aprint_error_dev(self, "unable to establish interrupt");
1023 if (intrstr != NULL)
1024 aprint_error(" at %s", intrstr);
1025 aprint_error("\n");
1026 goto fail;
1027 }
1028 aprint_normal_dev(self, "interrupting at %s\n",
1029 intrstr);
1030 }
1031
1032 /*
1033 * Finish off the attach.
1034 */
1035 error = tlp_attach(sc, enaddr);
1036 if (error)
1037 goto fail;
1038 return;
1039
1040 fail:
1041 if (psc->sc_ih != NULL) {
1042 pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
1043 psc->sc_ih = NULL;
1044 }
1045
1046 if (ioh_valid)
1047 bus_space_unmap(iot, ioh, iosize);
1048 if (memh_valid)
1049 bus_space_unmap(memt, memh, memsize);
1050 psc->sc_mapsize = 0;
1051 return;
1052 }
1053
1054 static int
tlp_pci_detach(device_t self,int flags)1055 tlp_pci_detach(device_t self, int flags)
1056 {
1057 struct tulip_pci_softc *psc = device_private(self);
1058 struct tulip_softc *sc = &psc->sc_tulip;
1059 int rv;
1060
1061 rv = tlp_detach(sc);
1062 if (rv)
1063 return rv;
1064
1065 if (psc->sc_ih != NULL) {
1066 pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
1067 psc->sc_ih = NULL;
1068 }
1069
1070 if (psc->sc_mapsize) {
1071 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize);
1072 psc->sc_mapsize = 0;
1073 }
1074
1075 return 0;
1076 }
1077
1078 static int
tlp_pci_shared_intr(void * arg)1079 tlp_pci_shared_intr(void *arg)
1080 {
1081 struct tulip_pci_softc *master = arg, *slave;
1082 int rv = 0;
1083
1084 for (slave = LIST_FIRST(&master->sc_intrslaves);
1085 slave != NULL;
1086 slave = LIST_NEXT(slave, sc_intrq))
1087 rv |= tlp_intr(&slave->sc_tulip);
1088
1089 return rv;
1090 }
1091
1092 static void
tlp_pci_dec_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1093 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1094 {
1095 struct tulip_softc *sc = &psc->sc_tulip;
1096
1097 /*
1098 * This isn't really a quirk-gathering device, really. We
1099 * just want to get the spiffy DEC board name from the SROM.
1100 */
1101 strcpy(sc->sc_name, "DEC ");
1102
1103 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
1104 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
1105 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
1106 else
1107 sc->sc_name[3] = '\0';
1108 }
1109
1110 static void
tlp_pci_znyx_21040_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1111 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1112 {
1113 struct tulip_softc *sc = &psc->sc_tulip;
1114 uint16_t id = 0;
1115
1116 /*
1117 * If we have a slaved ROM, just copy the bits from the master.
1118 * This is in case we fail the ROM ID check (older boards) and
1119 * need to fall back on Ethernet address model checking; that
1120 * will fail for slave chips.
1121 */
1122 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
1123 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
1124 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
1125 psc->sc_flags |=
1126 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
1127 return;
1128 }
1129
1130 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
1131 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
1132 switch (id) {
1133 zx312:
1134 case 0x0602: /* ZX312 */
1135 strcpy(sc->sc_name, "ZNYX ZX312");
1136 return;
1137
1138 case 0x0622: /* ZX312T */
1139 strcpy(sc->sc_name, "ZNYX ZX312T");
1140 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1141 return;
1142
1143 zx314_inta:
1144 case 0x0701: /* ZX314 INTA */
1145 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1146 /* FALLTHROUGH */
1147 case 0x0711: /* ZX314 */
1148 strcpy(sc->sc_name, "ZNYX ZX314");
1149 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1150 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1151 return;
1152
1153 zx315_inta:
1154 case 0x0801: /* ZX315 INTA */
1155 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1156 /* FALLTHROUGH */
1157 case 0x0811: /* ZX315 */
1158 strcpy(sc->sc_name, "ZNYX ZX315");
1159 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1160 return;
1161
1162 default:
1163 id = 0;
1164 break;
1165 }
1166 }
1167
1168 /*
1169 * Deal with boards that have broken ROMs.
1170 */
1171 if (id == 0) {
1172 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1173 goto zx314_inta;
1174 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1175 goto zx315_inta;
1176 if ((enaddr[3] & ~3) == 0xec)
1177 goto zx312;
1178 }
1179
1180 strcpy(sc->sc_name, "ZNYX ZX31x");
1181 }
1182
1183 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *);
1184
1185 static void
tlp_pci_znyx_21142_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1186 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1187 {
1188 struct tulip_softc *sc = &psc->sc_tulip;
1189 pcireg_t subid;
1190
1191 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG);
1192
1193 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX)
1194 return; /* ? */
1195
1196 switch (PCI_PRODUCT(subid) & 0xff) {
1197 /*
1198 * ZNYX 21143 boards with QS6611 PHY
1199 */
1200 case 0x12: /* ZX345Q */
1201 case 0x13: /* ZX346Q */
1202 case 0x14: /* ZX348Q */
1203 case 0x18: /* ZX414 */
1204 case 0x19: /* ZX412 */
1205 case 0x1a: /* ZX444 */
1206 case 0x1b: /* ZX442 */
1207 case 0x23: /* ZX212 */
1208 case 0x24: /* ZX214 */
1209 case 0x29: /* ZX374 */
1210 case 0x2d: /* ZX372 */
1211 case 0x2b: /* ZX244 */
1212 case 0x2c: /* ZX424 */
1213 case 0x2e: /* ZX422 */
1214 aprint_normal_dev(sc->sc_dev, "QS6611 PHY\n");
1215 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset;
1216 break;
1217 }
1218 }
1219
1220 static void
tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc * sc)1221 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc)
1222 {
1223
1224 /*
1225 * Reset QS6611 PHY.
1226 */
1227 TULIP_WRITE(sc, CSR_SIAGEN,
1228 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16));
1229 delay(200);
1230 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16));
1231 delay(10000);
1232 }
1233
1234 static void
tlp_pci_smc_21040_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1235 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1236 {
1237 struct tulip_softc *sc = &psc->sc_tulip;
1238 uint16_t id1, id2, ei;
1239 int auibnc = 0, utp = 0;
1240 char *cp;
1241
1242 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1243 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1244 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1245
1246 strcpy(sc->sc_name, "SMC 8432");
1247 cp = &sc->sc_name[8];
1248
1249 if ((id1 & 1) == 0) {
1250 *cp++ = 'B';
1251 auibnc = 1;
1252 }
1253 if ((id1 & 0xff) > 0x32) {
1254 *cp++ = 'T';
1255 utp = 1;
1256 }
1257 if ((id1 & 0x4000) == 0) {
1258 *cp++ = 'A';
1259 auibnc = 1;
1260 }
1261 if (id2 == 0x15) {
1262 sc->sc_name[7] = '4';
1263 *cp++ = '-';
1264 *cp++ = 'C';
1265 *cp++ = 'H';
1266 *cp++ = ei ? '2' : '1';
1267 }
1268 *cp = '\0';
1269
1270 if (utp != 0 && auibnc == 0)
1271 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1272 else if (utp == 0 && auibnc != 0)
1273 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1274 }
1275
1276 static void
tlp_pci_cogent_21040_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1277 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1278 {
1279
1280 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1281 psc->sc_flags |= TULIP_PCI_SHAREDINTR | TULIP_PCI_SHAREDROM;
1282 }
1283
1284 static void
tlp_pci_accton_21040_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1285 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1286 {
1287
1288 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1289 }
1290
1291 static void tlp_pci_asante_21140_reset(struct tulip_softc *);
1292
1293 static void
tlp_pci_asante_21140_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1294 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1295 {
1296 struct tulip_softc *sc = &psc->sc_tulip;
1297
1298 /*
1299 * Some Asante boards don't use the ISV SROM format. For
1300 * those that don't, we initialize the GPIO direction bits,
1301 * and provide our own reset hook, which resets the MII.
1302 *
1303 * All of these boards use SIO-attached-MII media.
1304 */
1305 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1306 return;
1307
1308 strcpy(sc->sc_name, "Asante");
1309
1310 sc->sc_gp_dir = 0xbf;
1311 sc->sc_reset = tlp_pci_asante_21140_reset;
1312 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1313 }
1314
1315 static void
tlp_pci_e100_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1316 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1317 {
1318 struct tulip_softc *sc = &psc->sc_tulip;
1319
1320 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1321 return;
1322
1323 strcpy(sc->sc_name, "UMAX E100");
1324
1325 sc->sc_gp_dir = 0xbf;
1326 sc->sc_reset = tlp_pci_asante_21140_reset;
1327 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1328 }
1329
1330 static void
tlp_pci_asante_21140_reset(struct tulip_softc * sc)1331 tlp_pci_asante_21140_reset(struct tulip_softc *sc)
1332 {
1333
1334 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1335 TULIP_WRITE(sc, CSR_GPP, 0x8);
1336 delay(100);
1337 TULIP_WRITE(sc, CSR_GPP, 0);
1338 }
1339
1340 static void tlp_pci_phobos_21140_reset(struct tulip_softc *);
1341
1342 static void
tlp_pci_phobos_21140_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1343 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1344 {
1345 struct tulip_softc *sc = &psc->sc_tulip;
1346
1347 /*
1348 * Phobos boards just use MII-on-SIO.
1349 */
1350 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1351 sc->sc_reset = tlp_pci_phobos_21140_reset;
1352
1353 /*
1354 * These boards appear solely on sgimips machines behind a special
1355 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0.
1356 */
1357 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO);
1358 }
1359
1360 static void
tlp_pci_phobos_21140_reset(struct tulip_softc * sc)1361 tlp_pci_phobos_21140_reset(struct tulip_softc *sc)
1362 {
1363
1364 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xfd);
1365 delay(10);
1366 TULIP_WRITE(sc, CSR_GPP, 0xfd);
1367 delay(10);
1368 TULIP_WRITE(sc, CSR_GPP, 0);
1369 }
1370
1371 /*
1372 * SMC 9332DST media switch.
1373 */
1374 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *);
1375
1376 static const struct tulip_mediasw tlp_smc9332dst_mediasw = {
1377 tlp_smc9332dst_tmsw_init,
1378 tlp_21140_gpio_get,
1379 tlp_21140_gpio_set
1380 };
1381
1382 static void
tlp_pci_smc_21140_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1383 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1384 {
1385 struct tulip_softc *sc = &psc->sc_tulip;
1386
1387 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST");
1388 sc->sc_mediasw = &tlp_smc9332dst_mediasw;
1389 }
1390
1391 static void
tlp_smc9332dst_tmsw_init(struct tulip_softc * sc)1392 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc)
1393 {
1394 struct tulip_21x4x_media *tm;
1395 struct mii_data *mii = &sc->sc_mii;
1396 const char *sep = "";
1397 uint32_t reg;
1398 int i, cnt;
1399
1400 sc->sc_gp_dir = GPP_SMC9332DST_PINS;
1401 sc->sc_opmode = OPMODE_MBO | OPMODE_PS;
1402 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
1403
1404 ifmedia_init(&mii->mii_media, 0, tlp_mediachange, tlp_mediastatus);
1405 aprint_normal_dev(sc->sc_dev, "");
1406
1407 #define ADD(m, c) \
1408 tm = kmem_zalloc(sizeof(*tm), KM_SLEEP); \
1409 tm->tm_opmode = (c); \
1410 tm->tm_gpdata = GPP_SMC9332DST_INIT; \
1411 ifmedia_add(&mii->mii_media, (m), 0, tm)
1412 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
1413
1414 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM);
1415 PRINT("10baseT");
1416
1417 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
1418 OPMODE_TTM | OPMODE_FD);
1419 PRINT("10baseT-FDX");
1420
1421 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
1422 OPMODE_PS | OPMODE_PCS | OPMODE_SCR);
1423 PRINT("100baseTX");
1424
1425 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
1426 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD);
1427 PRINT("100baseTX-FDX");
1428
1429 #undef ADD
1430 #undef PRINT
1431
1432 aprint_normal("\n");
1433
1434 tlp_reset(sc);
1435 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR);
1436 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1437 delay(10);
1438 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT);
1439 delay(200000);
1440 cnt = 0;
1441 for (i = 1000; i > 0; i--) {
1442 reg = TULIP_READ(sc, CSR_GPP);
1443 if ((~reg & (GPP_SMC9332DST_OK10 |
1444 GPP_SMC9332DST_OK100)) == 0) {
1445 if (cnt++ > 100) {
1446 break;
1447 }
1448 } else if ((reg & GPP_SMC9332DST_OK10) == 0) {
1449 break;
1450 } else {
1451 cnt = 0;
1452 }
1453 delay(1000);
1454 }
1455 if (cnt > 100)
1456 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_100_TX);
1457 else
1458 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_10_T);
1459 }
1460
1461 static void
tlp_pci_vpc_21140_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1462 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1463 {
1464 struct tulip_softc *sc = &psc->sc_tulip;
1465 char *p1 = (char *)&sc->sc_srom[32];
1466 char *p2 = &sc->sc_name[0];
1467
1468 do {
1469 if ((unsigned char) *p1 & 0x80)
1470 *p2++ = ' ';
1471 else
1472 *p2++ = *p1;
1473 } while (*p1++);
1474 }
1475
1476 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *);
1477
1478 static void
tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1479 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1480 {
1481 struct tulip_softc *sc = &psc->sc_tulip;
1482
1483 /*
1484 * Cobalt Networks interfaces are just MII-on-SIO.
1485 */
1486 sc->sc_reset = tlp_pci_cobalt_21142_reset;
1487 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1488
1489 /*
1490 * The Cobalt systems tend to fall back to store-and-forward
1491 * pretty quickly, so we select that from the beginning to
1492 * avoid initial timeouts.
1493 */
1494 sc->sc_txthresh = TXTH_SF;
1495 }
1496
1497 static void
tlp_pci_cobalt_21142_reset(struct tulip_softc * sc)1498 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc)
1499 {
1500
1501 /*
1502 * Reset PHY.
1503 */
1504 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16));
1505 delay(10);
1506 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE);
1507 delay(10);
1508 }
1509
1510 static void
tlp_pci_algor_21142_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1511 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1512 {
1513 struct tulip_softc *sc = &psc->sc_tulip;
1514
1515 /*
1516 * Algorithmics boards just have MII-on-SIO.
1517 *
1518 * XXX They also have AUI on the serial interface.
1519 * XXX Deal with this.
1520 */
1521 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1522 }
1523
1524 /*
1525 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch.
1526 */
1527 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *);
1528
1529 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = {
1530 tlp_cogent_em1x0_tmsw_init,
1531 tlp_21140_gpio_get,
1532 tlp_21140_gpio_set
1533 };
1534
1535 static void
tlp_pci_adaptec_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1536 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1537 {
1538 struct tulip_softc *sc = &psc->sc_tulip;
1539 uint8_t *srom = sc->sc_srom, id0;
1540 uint16_t id1, id2;
1541
1542 if (sc->sc_mediasw == NULL) {
1543 id0 = srom[32];
1544 switch (id0) {
1545 case 0x12:
1546 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX");
1547 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1548 break;
1549
1550 case 0x13:
1551 strcpy(psc->sc_tulip.sc_name, "Cogent ???");
1552 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1553 psc->sc_flags |= TULIP_PCI_SHAREDINTR |
1554 TULIP_PCI_SHAREDROM;
1555 break;
1556
1557 case 0x15:
1558 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX");
1559 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1560 break;
1561
1562 #if 0
1563 case XXX:
1564 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX");
1565 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1566 break;
1567 #endif
1568
1569 default:
1570 printf("%s: unknown Cogent board ID 0x%02x\n",
1571 device_xname(sc->sc_dev), id0);
1572 }
1573 return;
1574 }
1575
1576 id1 = TULIP_ROM_GETW(srom, 0);
1577 id2 = TULIP_ROM_GETW(srom, 2);
1578 if (id1 != 0x1109) {
1579 goto unknown;
1580 }
1581
1582 switch (id2) {
1583 case 0x1900:
1584 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911");
1585 break;
1586
1587 case 0x2400:
1588 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A");
1589 psc->sc_flags |= TULIP_PCI_SHAREDINTR | TULIP_PCI_SHAREDROM;
1590 break;
1591
1592 case 0x2b00:
1593 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A");
1594 break;
1595
1596 case 0x3000:
1597 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922");
1598 psc->sc_flags |= TULIP_PCI_SHAREDINTR | TULIP_PCI_SHAREDROM;
1599 break;
1600
1601 default:
1602 unknown:
1603 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n",
1604 device_xname(sc->sc_dev), id1, id2);
1605 }
1606 }
1607
1608 static void
tlp_cogent_em1x0_tmsw_init(struct tulip_softc * sc)1609 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc)
1610 {
1611 struct tulip_21x4x_media *tm;
1612 struct mii_data *mii = &sc->sc_mii;
1613 const char *sep = "";
1614
1615 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS;
1616 sc->sc_opmode = OPMODE_MBO | OPMODE_PS;
1617 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
1618
1619 ifmedia_init(&mii->mii_media, 0, tlp_mediachange, tlp_mediastatus);
1620 aprint_normal_dev(sc->sc_dev, "");
1621
1622 #define ADD(m, c) \
1623 tm = kmem_zalloc(sizeof(*tm), KM_SLEEP); \
1624 tm->tm_opmode = (c); \
1625 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \
1626 ifmedia_add(&mii->mii_media, (m), 0, tm)
1627 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
1628
1629 if (sc->sc_srom[32] == 0x15) {
1630 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0),
1631 OPMODE_PS | OPMODE_PCS);
1632 PRINT("100baseFX");
1633
1634 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0),
1635 OPMODE_PS | OPMODE_PCS | OPMODE_FD);
1636 PRINT("100baseFX-FDX");
1637 aprint_normal("\n");
1638
1639 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_100_FX);
1640 } else {
1641 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
1642 OPMODE_PS | OPMODE_PCS | OPMODE_SCR);
1643 PRINT("100baseTX");
1644
1645 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0),
1646 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD);
1647 PRINT("100baseTX-FDX");
1648 aprint_normal("\n");
1649
1650 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_100_TX);
1651 }
1652
1653 #undef ADD
1654 #undef PRINT
1655 }
1656
1657 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *);
1658
1659 static void
tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1660 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc,
1661 const uint8_t *enaddr)
1662 {
1663 struct tulip_softc *sc = &psc->sc_tulip;
1664
1665 /*
1666 * Netwinders just use MII-on-SIO.
1667 */
1668 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1669 sc->sc_reset = tlp_pci_netwinder_21142_reset;
1670 }
1671
1672 void
tlp_pci_netwinder_21142_reset(struct tulip_softc * sc)1673 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc)
1674 {
1675
1676 /*
1677 * Reset the PHY.
1678 */
1679 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16);
1680 delay(10);
1681 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16);
1682 delay(10);
1683 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16);
1684 delay(10);
1685 }
1686
1687 static void tlp_pci_phobos_21142_reset(struct tulip_softc *);
1688
1689 static void
tlp_pci_phobos_21142_quirks(struct tulip_pci_softc * psc,const uint8_t * enaddr)1690 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr)
1691 {
1692 struct tulip_softc *sc = &psc->sc_tulip;
1693
1694 /*
1695 * Phobos boards just use MII-on-SIO.
1696 */
1697 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1698 sc->sc_reset = tlp_pci_phobos_21142_reset;
1699
1700 /*
1701 * These boards appear solely on sgimips machines behind a special
1702 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0.
1703 */
1704 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO);
1705 }
1706
1707 static void
tlp_pci_phobos_21142_reset(struct tulip_softc * sc)1708 tlp_pci_phobos_21142_reset(struct tulip_softc *sc)
1709 {
1710 /*
1711 * Reset PHY.
1712 */
1713 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16));
1714 delay(10);
1715 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16));
1716 delay(10);
1717 }
1718