xref: /netbsd-src/sys/dev/cardbus/if_atw_cardbus.c (revision 9ad90ada5a40281d2484b05cab5592e1b91ff587)
1 /* $NetBSD: if_atw_cardbus.c,v 1.37 2022/09/25 17:33:19 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.  This code was adapted for the ADMtek ADM8211
10  * by David Young.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
36  */
37 
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.37 2022/09/25 17:33:19 thorpej Exp $");
40 
41 #include "opt_inet.h"
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/mbuf.h>
46 #include <sys/kernel.h>
47 #include <sys/socket.h>
48 #include <sys/ioctl.h>
49 #include <sys/errno.h>
50 #include <sys/device.h>
51 
52 #include <machine/endian.h>
53 
54 #include <net/if.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/if_ether.h>
58 
59 #include <net80211/ieee80211_netbsd.h>
60 #include <net80211/ieee80211_radiotap.h>
61 #include <net80211/ieee80211_var.h>
62 
63 #ifdef INET
64 #include <netinet/in.h>
65 #include <netinet/if_inarp.h>
66 #endif
67 
68 
69 #include <sys/bus.h>
70 #include <sys/intr.h>
71 
72 #include <dev/ic/atwreg.h>
73 #include <dev/ic/rf3000reg.h>
74 #include <dev/ic/si4136reg.h>
75 #include <dev/ic/atwvar.h>
76 
77 #include <dev/pci/pcivar.h>
78 #include <dev/pci/pcireg.h>
79 #include <dev/pci/pcidevs.h>
80 
81 #include <dev/cardbus/cardbusvar.h>
82 #include <dev/pci/pcidevs.h>
83 
84 /*
85  * PCI configuration space registers used by the ADM8211.
86  */
87 #define ATW_PCI_IOBA PCI_BAR(0)	/* i/o mapped base */
88 #define ATW_PCI_MMBA PCI_BAR(1)	/* memory mapped base */
89 
90 struct atw_cardbus_softc {
91 	struct atw_softc sc_atw;
92 
93 	/* CardBus-specific goo. */
94 	void			*sc_ih;		/* interrupt handle */
95 	cardbus_devfunc_t	sc_ct;		/* our CardBus devfuncs */
96 	pcitag_t		sc_tag;		/* our CardBus tag */
97 	pcireg_t		sc_csr;		/* CSR bits */
98 	bus_size_t		sc_mapsize;	/* the size of mapped bus space
99 						 * region
100 						 */
101 
102 	int			sc_bar_reg;	/* which BAR to use */
103 	pcireg_t		sc_bar_val;	/* value of the BAR */
104 };
105 
106 static int	atw_cardbus_match(device_t, cfdata_t, void *);
107 static void	atw_cardbus_attach(device_t, device_t, void *);
108 static int	atw_cardbus_detach(device_t, int);
109 
110 CFATTACH_DECL3_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc),
111     atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate,
112     NULL, NULL, DVF_DETACH_SHUTDOWN);
113 
114 static void	atw_cardbus_setup(struct atw_cardbus_softc *);
115 
116 static bool	atw_cardbus_suspend(device_t, const pmf_qual_t *);
117 static bool	atw_cardbus_resume(device_t, const pmf_qual_t *);
118 
119 static const struct atw_cardbus_product *atw_cardbus_lookup
120    (const struct cardbus_attach_args *);
121 
122 static const struct atw_cardbus_product {
123 	u_int32_t	 acp_vendor;	/* PCI vendor ID */
124 	u_int32_t	 acp_product;	/* PCI product ID */
125 	const char	*acp_product_name;
126 } atw_cardbus_products[] = {
127 	{ PCI_VENDOR_ADMTEK,		PCI_PRODUCT_ADMTEK_ADM8211,
128 	  "ADMtek ADM8211 802.11 MAC/BBP" },
129 
130 	{ 0,				0,	NULL },
131 };
132 
133 static const struct atw_cardbus_product *
atw_cardbus_lookup(const struct cardbus_attach_args * ca)134 atw_cardbus_lookup(const struct cardbus_attach_args *ca)
135 {
136 	const struct atw_cardbus_product *acp;
137 
138 	for (acp = atw_cardbus_products; acp->acp_product_name != NULL; acp++) {
139 		if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
140 		    PCI_PRODUCT(ca->ca_id) == acp->acp_product)
141 			return acp;
142 	}
143 	return NULL;
144 }
145 
146 static int
atw_cardbus_match(device_t parent,cfdata_t match,void * aux)147 atw_cardbus_match(device_t parent, cfdata_t match, void *aux)
148 {
149 	struct cardbus_attach_args *ca = aux;
150 
151 	if (atw_cardbus_lookup(ca) != NULL)
152 		return 1;
153 
154 	return 0;
155 }
156 
157 static void
atw_cardbus_attach(device_t parent,device_t self,void * aux)158 atw_cardbus_attach(device_t parent, device_t self, void *aux)
159 {
160 	struct atw_cardbus_softc *csc = device_private(self);
161 	struct atw_softc *sc = &csc->sc_atw;
162 	struct cardbus_attach_args *ca = aux;
163 	cardbus_devfunc_t ct = ca->ca_ct;
164 	const struct atw_cardbus_product *acp;
165 #if 0
166 	int i;
167 #define	FUNCREG(__x)	{#__x, (__x)}
168 	struct {
169 		const char *name;
170 		bus_size_t ofs;
171 	} funcregs[] = {
172 		FUNCREG(ATW_FER), FUNCREG(ATW_FEMR), FUNCREG(ATW_FPSR),
173 		FUNCREG(ATW_FFER)
174 	};
175 #undef FUNCREG
176 #endif
177 	bus_addr_t adr;
178 
179 	sc->sc_dev = self;
180 	sc->sc_dmat = ca->ca_dmat;
181 	csc->sc_ct = ct;
182 	csc->sc_tag = ca->ca_tag;
183 
184 	acp = atw_cardbus_lookup(ca);
185 	if (acp == NULL) {
186 		printf("\n");
187 		panic("atw_cardbus_attach: impossible");
188 	}
189 
190 	/* Get revision info. */
191 	sc->sc_rev = PCI_REVISION(ca->ca_class);
192 
193 	printf(": %s, revision %d.%d\n", acp->acp_product_name,
194 	    (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
195 
196 #if 0
197 	printf("%s: signature %08x\n", device_xname(self),
198 	    (rev >> 4) & 0xf, rev & 0xf,
199 	    Cardbus_conf_read(ct, csc->sc_tag, 0x80));
200 #endif
201 
202 	/*
203 	 * Map the device.
204 	 */
205 	csc->sc_csr = PCI_COMMAND_MASTER_ENABLE |
206 	              PCI_COMMAND_PARITY_ENABLE |
207 		      PCI_COMMAND_SERR_ENABLE;
208 	if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
209 	    PCI_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
210 	    &csc->sc_mapsize) == 0) {
211 #if 0
212 		printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
213 		    device_xname(self), csc->sc_mapsize);
214 #endif
215 		csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
216 		csc->sc_bar_reg = ATW_PCI_MMBA;
217 		csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
218 	} else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
219 	    PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
220 	    &csc->sc_mapsize) == 0) {
221 #if 0
222 		printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
223 		    device_xname(self), csc->sc_mapsize);
224 #endif
225 		csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
226 		csc->sc_bar_reg = ATW_PCI_IOBA;
227 		csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
228 	} else {
229 		aprint_error_dev(self, "unable to map device registers\n");
230 		return;
231 	}
232 
233 	/*
234 	 * Bring the chip out of powersave mode and initialize the
235 	 * configuration registers.
236 	 */
237 	atw_cardbus_setup(csc);
238 
239 #if 0
240 	/*
241 	 * The CardBus cards will make it to store-and-forward mode as
242 	 * soon as you put them under any kind of load, so just start
243 	 * out there.
244 	 */
245 	sc->sc_txthresh = 3; /* TBD name constant */
246 #endif
247 
248 #if 0
249 	for (i = 0; i < __arraycount(funcregs); i++) {
250 		aprint_error_dev(sc->sc_dev, "%s %" PRIx32 "\n",
251 		    funcregs[i].name, ATW_READ(sc, funcregs[i].ofs));
252 	}
253 #endif
254 
255 	ATW_WRITE(sc, ATW_FEMR, 0);
256 	ATW_WRITE(sc, ATW_FER, ATW_READ(sc, ATW_FER));
257 
258 	/*
259 	 * Bus-independent attach.
260 	 */
261 	atw_attach(sc);
262 
263 	if (pmf_device_register1(sc->sc_dev, atw_cardbus_suspend,
264 	    atw_cardbus_resume, atw_shutdown))
265 		pmf_class_network_register(sc->sc_dev, &sc->sc_if);
266 	else
267 		aprint_error_dev(sc->sc_dev,
268 		    "couldn't establish power handler\n");
269 
270 	/*
271 	 * Power down the socket.
272 	 */
273 	pmf_device_suspend(sc->sc_dev, &sc->sc_qual);
274 }
275 
276 static int
atw_cardbus_detach(device_t self,int flags)277 atw_cardbus_detach(device_t self, int flags)
278 {
279 	struct atw_cardbus_softc *csc = device_private(self);
280 	struct atw_softc *sc = &csc->sc_atw;
281 	struct cardbus_devfunc *ct = csc->sc_ct;
282 	int rv;
283 
284 #if defined(DIAGNOSTIC)
285 	if (ct == NULL)
286 		panic("%s: data structure lacks", device_xname(self));
287 #endif
288 
289 	rv = atw_detach(sc);
290 	if (rv != 0)
291 		return rv;
292 
293 	/*
294 	 * Unhook the interrupt handler.
295 	 */
296 	if (csc->sc_ih != NULL)
297 		Cardbus_intr_disestablish(ct, csc->sc_ih);
298 
299 	/*
300 	 * Release bus space and close window.
301 	 */
302 	if (csc->sc_bar_reg != 0)
303 		Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
304 		    sc->sc_st, sc->sc_sh, csc->sc_mapsize);
305 
306 	return 0;
307 }
308 
309 static bool
atw_cardbus_resume(device_t self,const pmf_qual_t * qual)310 atw_cardbus_resume(device_t self, const pmf_qual_t *qual)
311 {
312 	struct atw_cardbus_softc *csc = device_private(self);
313 	struct atw_softc *sc = &csc->sc_atw;
314 	cardbus_devfunc_t ct = csc->sc_ct;
315 
316 	/*
317 	 * Map and establish the interrupt.
318 	 */
319 	csc->sc_ih = Cardbus_intr_establish(ct, IPL_NET, atw_intr, sc);
320 	if (csc->sc_ih == NULL) {
321 		aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n");
322 		return false;
323 	}
324 
325 	return true;
326 }
327 
328 static bool
atw_cardbus_suspend(device_t self,const pmf_qual_t * qual)329 atw_cardbus_suspend(device_t self, const pmf_qual_t *qual)
330 {
331 	struct atw_cardbus_softc *csc = device_private(self);
332 	cardbus_devfunc_t ct = csc->sc_ct;
333 
334 	/* Unhook the interrupt handler. */
335 	Cardbus_intr_disestablish(ct, csc->sc_ih);
336 	csc->sc_ih = NULL;
337 
338 	return atw_suspend(self, qual);
339 }
340 
341 static void
atw_cardbus_setup(struct atw_cardbus_softc * csc)342 atw_cardbus_setup(struct atw_cardbus_softc *csc)
343 {
344 	cardbus_devfunc_t ct = csc->sc_ct;
345 	pcireg_t csr;
346 	int rc;
347 
348 	if ((rc = cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0)) != 0)
349 		aprint_debug("%s: cardbus_set_powerstate %d\n", __func__, rc);
350 
351 	/* Program the BAR. */
352 	Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg,
353 	    csc->sc_bar_val);
354 
355 	/* Enable the appropriate bits in the PCI CSR. */
356 	csr = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
357 	csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
358 	csr |= csc->sc_csr;
359 	Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, csr);
360 }
361