xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/iceland_smumgr.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: iceland_smumgr.h,v 1.2 2021/12/18 23:45:27 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2016 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Author: Huang Rui <ray.huang@amd.com>
25  *
26  */
27 
28 #ifndef _ICELAND_SMUMGR_H_
29 #define _ICELAND_SMUMGR_H_
30 
31 
32 #include "smu7_smumgr.h"
33 #include "pp_endian.h"
34 #include "smu71_discrete.h"
35 
36 struct iceland_pt_defaults {
37 	uint8_t   svi_load_line_en;
38 	uint8_t   svi_load_line_vddc;
39 	uint8_t   tdc_vddc_throttle_release_limit_perc;
40 	uint8_t   tdc_mawt;
41 	uint8_t   tdc_waterfall_ctl;
42 	uint8_t   dte_ambient_temp_base;
43 	uint32_t  display_cac;
44 	uint32_t  bapm_temp_gradient;
45 	uint16_t  bapmti_r[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS];
46 	uint16_t  bapmti_rc[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS];
47 };
48 
49 struct iceland_mc_reg_entry {
50 	uint32_t mclk_max;
51 	uint32_t mc_data[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE];
52 };
53 
54 struct iceland_mc_reg_table {
55 	uint8_t   last;               /* number of registers*/
56 	uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
57 	uint16_t  validflag;          /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/
58 	struct iceland_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
59 	SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE];
60 };
61 
62 struct iceland_smumgr {
63 	struct smu7_smumgr smu7_data;
64 	struct SMU71_Discrete_DpmTable       smc_state_table;
65 	struct SMU71_Discrete_PmFuses  power_tune_table;
66 	struct SMU71_Discrete_Ulv            ulv_setting;
67 	const struct iceland_pt_defaults  *power_tune_defaults;
68 	SMU71_Discrete_MCRegisters      mc_regs;
69 	struct iceland_mc_reg_table mc_reg_table;
70 };
71 
72 #endif
73