1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Huawei Technologies Co., Ltd 3 */ 4 5 #ifndef _HINIC_PMD_CMDQ_H_ 6 #define _HINIC_PMD_CMDQ_H_ 7 8 #define HINIC_DB_OFF 0x00000800 9 10 #define HINIC_SCMD_DATA_LEN 16 11 12 /* PMD uses 64, kernel l2nic use 4096 */ 13 #define HINIC_CMDQ_DEPTH 64 14 15 #define HINIC_CMDQ_BUF_SIZE 2048U 16 #define HINIC_CMDQ_BUF_HW_RSVD 8 17 #define HINIC_CMDQ_MAX_DATA_SIZE (HINIC_CMDQ_BUF_SIZE \ 18 - HINIC_CMDQ_BUF_HW_RSVD) 19 20 #define HINIC_CEQ_ID_CMDQ 0 21 22 enum cmdq_scmd_type { 23 CMDQ_SET_ARM_CMD = 2, 24 }; 25 26 enum cmdq_wqe_type { 27 WQE_LCMD_TYPE, 28 WQE_SCMD_TYPE, 29 }; 30 31 enum ctrl_sect_len { 32 CTRL_SECT_LEN = 1, 33 CTRL_DIRECT_SECT_LEN = 2, 34 }; 35 36 enum bufdesc_len { 37 BUFDESC_LCMD_LEN = 2, 38 BUFDESC_SCMD_LEN = 3, 39 }; 40 41 enum data_format { 42 DATA_SGE, 43 }; 44 45 enum completion_format { 46 COMPLETE_DIRECT, 47 COMPLETE_SGE, 48 }; 49 50 enum completion_request { 51 CEQ_SET = 1, 52 }; 53 54 enum cmdq_cmd_type { 55 SYNC_CMD_DIRECT_RESP, 56 SYNC_CMD_SGE_RESP, 57 ASYNC_CMD, 58 }; 59 60 enum hinic_cmdq_type { 61 HINIC_CMDQ_SYNC, 62 HINIC_CMDQ_ASYNC, 63 HINIC_MAX_CMDQ_TYPES, 64 }; 65 66 enum hinic_db_src_type { 67 HINIC_DB_SRC_CMDQ_TYPE, 68 HINIC_DB_SRC_L2NIC_SQ_TYPE, 69 }; 70 71 enum hinic_cmdq_db_type { 72 HINIC_DB_SQ_RQ_TYPE, 73 HINIC_DB_CMDQ_TYPE, 74 }; 75 76 /* CMDQ WQE CTRLS */ 77 struct hinic_cmdq_header { 78 u32 header_info; 79 u32 saved_data; 80 }; 81 82 struct hinic_scmd_bufdesc { 83 u32 buf_len; 84 u32 rsvd; 85 u8 data[HINIC_SCMD_DATA_LEN]; 86 }; 87 88 struct hinic_lcmd_bufdesc { 89 struct hinic_sge sge; 90 u32 rsvd1; 91 u64 saved_async_buf; 92 u64 rsvd3; 93 }; 94 95 struct hinic_cmdq_db { 96 u32 db_info; 97 u32 rsvd; 98 }; 99 100 struct hinic_status { 101 u32 status_info; 102 }; 103 104 struct hinic_ctrl { 105 u32 ctrl_info; 106 }; 107 108 struct hinic_sge_resp { 109 struct hinic_sge sge; 110 u32 rsvd; 111 }; 112 113 struct hinic_cmdq_completion { 114 /* HW Format */ 115 union { 116 struct hinic_sge_resp sge_resp; 117 u64 direct_resp; 118 }; 119 }; 120 121 struct hinic_cmdq_wqe_scmd { 122 struct hinic_cmdq_header header; 123 struct hinic_cmdq_db db; 124 struct hinic_status status; 125 struct hinic_ctrl ctrl; 126 struct hinic_cmdq_completion completion; 127 struct hinic_scmd_bufdesc buf_desc; 128 }; 129 130 struct hinic_cmdq_wqe_lcmd { 131 struct hinic_cmdq_header header; 132 struct hinic_status status; 133 struct hinic_ctrl ctrl; 134 struct hinic_cmdq_completion completion; 135 struct hinic_lcmd_bufdesc buf_desc; 136 }; 137 138 struct hinic_cmdq_inline_wqe { 139 struct hinic_cmdq_wqe_scmd wqe_scmd; 140 }; 141 142 struct hinic_cmdq_wqe { 143 /* HW Format */ 144 union{ 145 struct hinic_cmdq_inline_wqe inline_wqe; 146 struct hinic_cmdq_wqe_lcmd wqe_lcmd; 147 }; 148 }; 149 150 struct hinic_cmdq_ctxt_info { 151 u64 curr_wqe_page_pfn; 152 u64 wq_block_pfn; 153 }; 154 155 /* New interface */ 156 struct hinic_cmdq_ctxt { 157 u8 status; 158 u8 version; 159 u8 resp_aeq_num; 160 u8 rsvd0[5]; 161 162 u16 func_idx; 163 u8 cmdq_id; 164 u8 ppf_idx; 165 166 u8 rsvd1[4]; 167 168 struct hinic_cmdq_ctxt_info ctxt_info; 169 }; 170 171 enum hinic_cmdq_status { 172 HINIC_CMDQ_ENABLE = BIT(0), 173 HINIC_CMDQ_SET_FAIL = BIT(1) 174 }; 175 176 enum hinic_cmdq_cmd_type { 177 HINIC_CMD_TYPE_NONE, 178 HINIC_CMD_TYPE_SET_ARM, 179 HINIC_CMD_TYPE_NORMAL, 180 }; 181 182 struct hinic_cmdq_cmd_info { 183 enum hinic_cmdq_cmd_type cmd_type; 184 }; 185 186 struct hinic_cmdq { 187 struct hinic_wq *wq; 188 189 enum hinic_cmdq_type cmdq_type; 190 int wrapped; 191 192 hinic_spinlock_t cmdq_lock; 193 194 int *errcode; 195 196 /* doorbell area */ 197 u8 __iomem *db_base; 198 199 struct hinic_cmdq_ctxt cmdq_ctxt; 200 201 struct hinic_cmdq_cmd_info *cmd_infos; 202 }; 203 204 struct hinic_cmdqs { 205 struct hinic_hwdev *hwdev; 206 207 struct pci_pool *cmd_buf_pool; 208 209 struct hinic_wq *saved_wqs; 210 211 struct hinic_cmdq cmdq[HINIC_MAX_CMDQ_TYPES]; 212 213 u32 status; 214 }; 215 216 struct hinic_cmd_buf { 217 void *buf; 218 dma_addr_t dma_addr; 219 struct rte_mbuf *mbuf; 220 u16 size; 221 }; 222 223 int hinic_reinit_cmdq_ctxts(struct hinic_hwdev *hwdev); 224 225 bool hinic_cmdq_idle(struct hinic_cmdq *cmdq); 226 227 struct hinic_cmd_buf *hinic_alloc_cmd_buf(void *hwdev); 228 229 void hinic_free_cmd_buf(void *hwdev, struct hinic_cmd_buf *cmd_buf); 230 231 /* PF/VF send cmd to ucode by cmdq, and return if success. 232 * timeout=0, use default timeout. 233 */ 234 int hinic_cmdq_direct_resp(void *hwdev, enum hinic_ack_type ack_type, 235 enum hinic_mod_type mod, u8 cmd, 236 struct hinic_cmd_buf *buf_in, 237 u64 *out_param, u32 timeout); 238 239 int hinic_comm_cmdqs_init(struct hinic_hwdev *hwdev); 240 241 void hinic_comm_cmdqs_free(struct hinic_hwdev *hwdev); 242 243 #endif /* _HINIC_PMD_CMDQ_H_ */ 244