1/* $NetBSD: gumstix_start.S,v 1.16 2019/05/18 08:49:24 skrll Exp $ */ 2/* 3 * Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation. 4 * All rights reserved. 5 * 6 * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM 7 * Corporation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of the project nor the name of SOUM Corporation 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS'' 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33/* 34 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved. 35 * Written by Hiroyuki Bessho for Genetec Corporation. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. The name of Genetec Corporation may not be used to endorse or 46 * promote products derived from this software without specific prior 47 * written permission. 48 * 49 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 50 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 51 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 52 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 53 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 54 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 55 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 56 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 57 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 58 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 59 * POSSIBILITY OF SUCH DAMAGE. 60 */ 61 62#include "opt_cputypes.h" 63#include "opt_gumstix.h" 64#include "opt_multiprocessor.h" 65 66#include <machine/asm.h> 67#include <arm/armreg.h> 68#include "assym.h" 69 70 71RCSID("$NetBSD: gumstix_start.S,v 1.16 2019/05/18 08:49:24 skrll Exp $") 72 73/* 74 * CPWAIT -- Canonical method to wait for CP15 update. 75 * NOTE: Clobbers the specified temp reg. 76 * copied from arm/arm/cpufunc_asm_xscale.S 77 * XXX: better be in a common header file. 78 */ 79#if defined(CPU_XSCALE) 80#define CPWAIT_BRANCH \ 81 sub pc, pc, #4 82#else 83#define CPWAIT_BRANCH 84#endif 85 86#define CPWAIT(tmp) \ 87 mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ; \ 88 mov tmp, tmp /* wait for it to complete */ ; \ 89 CPWAIT_BRANCH /* branch to next insn */ 90 91/* 92 * Kernel start routine for GUMSTIX 93 * this code is excuted at the very first after the kernel is loaded 94 * by U-Boot. 95 */ 96 .text 97 98 .global _C_LABEL(gumstix_start) 99_C_LABEL(gumstix_start): 100 /* 101 * gumstix's loader is U-boot. it's running on RAM 102 */ 103 104 /* Our page table might be cached. Disable D-cache beforehand. */ 105 mrc p15, 0, ip, c1, c0, 0 106 bic ip, ip, #CPU_CONTROL_DC_ENABLE 107 mcr p15, 0, ip, c1, c0, 0 108 109 /* 110 * Kernel is loaded in SDRAM (0xa0200000..), and is expected to run 111 * in VA 0xc0200000.. 112 */ 113 114 /* save u-boot's args */ 115 adr ip, uboot_args 116 nop 117 nop 118 nop 119 stmia ip!, {r0, r1, r2, r3} 120 nop 121 nop 122 nop 123 124 /* Calculate RAM size, like vendor's u-boot. */ 125 adr ip, ram_size 126 ldr r0, [ip] 127 128 mrc p15, 0, r1, c0, c0, 0 129 and r1, r1, #CPU_ID_XSCALE_COREGEN_MASK 130 cmp r1, #0x4000 131 bne 3f /* goto 3f, if basix or connex */ 1320: 133 /* check memory size, if verdex or verdex-pro */ 134 add r3, ip, r0 135 ldr r1, [r3] 136 cmp r0, r1 137 beq 2f 1381: 139 add r0, r0, r0 /* r0 <<= 1 */ 140 str r0, [ip] 141 b 0b 1422: 143 mvn r1, r1 /* r1 ^= 0xffffffff */ 144 str r1, [r3] 145 ldr r2, [ip] 146 cmp r1, r2 147 beq 3f 148 str r0, [r3] /* restore */ 149 b 1b 1503: 151 str r0, [ip] 152 153 /* Build page table from scratch */ 154 ldr r0, Lstartup_pagetable /* pagetable */ 155 adr ip, mmu_init_table 156 b 5f 157 1584: 159 str r3, [r0, r2, lsl #2] 160 add r2, r2, #1 161 add r3, r3, #(L1_S_SIZE) 162 adds r1, r1, #-1 163 bhi 4b 1645: 165 ldmia ip!, {r1, r2, r3} /* # of sections, PA|attr, VA */ 166 lsr r2, r2, #L1_S_SHIFT 167 cmp r1, #0 168 bne 4b 169 170 mov r1, r0 171 mcr p15, 0, r1, c2, c0, 0 /* Set TTB */ 172 mcr p15, 0, r1, c8, c7, 0 /* Flush TLB */ 173 174 /* 175 * Set the Domain Access register. Very important! 176 * startup_pagetable puts to domain 0 now. 177 */ 178#define KERNEL_DOMAIN(x) ((x) << (PMAP_DOMAIN_KERNEL << 1)) 179 mov r1, #(KERNEL_DOMAIN(DOMAIN_CLIENT) | DOMAIN_CLIENT) 180 mcr p15, 0, r1, c3, c0, 0 181 182 /* Enable MMU and etc. */ 183 mrc p15, 0, r1, c1, c0, 0 184#if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270) 185 orr r1, r1, #CPU_CONTROL_SYST_ENABLE 186#endif 187 orr r1, r1, #CPU_CONTROL_MMU_ENABLE 188 mcr p15, 0, r1, c1, c0, 0 189 /* 190 * Ensure that the coprocessor has finished turning on the MMU. 191 */ 192 CPWAIT(r3) 193 194 195 /* Jump to kernel code in TRUE VA */ 196 ldr r0, Lstart 197 bx r0 198 199Lstart: 200 .word start 201 202 203 .globl _C_LABEL(uboot_args) 204uboot_args: 205 .space 16 /* r0, r1, r2, r3 */ 206 207 .globl _C_LABEL(ram_size) 208ram_size: 209 .word 0x04000000 /* 64Mbyte */ 210 211 212#ifndef STARTUP_PAGETABLE_ADDR 213#define STARTUP_PAGETABLE_ADDR 0xa0000000 /* aligned 16kByte */ 214#endif 215Lstartup_pagetable: 216 .word STARTUP_PAGETABLE_ADDR 217 218 219#define MMU_INIT(va, pa, n_sec, attr) \ 220 .word n_sec ; \ 221 .word (va) ; \ 222 .word (pa) | (attr) ; 223 224mmu_init_table: 225 226 /* fill all table VA==PA */ 227 MMU_INIT(0x00000000, 0x00000000, 228 1 << (32 - L1_S_SHIFT), L1_S_PROTO | L1_S_AP_KRW) 229 230#define SDRAM_START 0xa0000000 231 232 /* map SDRAM VA==PA, write-back cacheable (first 64M only)*/ 233 MMU_INIT(SDRAM_START, SDRAM_START, 234 64, L1_S_PROTO | L1_S_C | L1_S_AP_KRW) 235 236 /* map VA 0xc0000000..0xc3ffffff to PA 0xa0000000..0xa3ffffff */ 237 MMU_INIT(0xc0000000, SDRAM_START, 238 64, L1_S_PROTO | L1_S_C | L1_S_AP_KRW) 239 240 241 MMU_INIT(0, 0, 0, 0) /* end of table */ 242 243#undef MMU_INIT 244 245