1 /* $NetBSD: nouveau_nvkm_engine_gr_gf117.c,v 1.4 2021/12/19 10:51:57 riastradh Exp $ */
2
3 /*
4 * Copyright 2013 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs <bskeggs@redhat.com>
25 */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_gr_gf117.c,v 1.4 2021/12/19 10:51:57 riastradh Exp $");
28
29 #include "gf100.h"
30 #include "ctxgf100.h"
31
32 #include <nvif/class.h>
33
34 #include <linux/nbsd-namespace.h>
35
36 /*******************************************************************************
37 * PGRAPH register lists
38 ******************************************************************************/
39
40 static const struct gf100_gr_init
41 gf117_gr_init_pe_0[] = {
42 { 0x41980c, 1, 0x04, 0x00000010 },
43 { 0x419844, 1, 0x04, 0x00000000 },
44 { 0x41984c, 1, 0x04, 0x00005bc8 },
45 { 0x419850, 3, 0x04, 0x00000000 },
46 {}
47 };
48
49 const struct gf100_gr_init
50 gf117_gr_init_pes_0[] = {
51 { 0x41be04, 1, 0x04, 0x00000000 },
52 { 0x41be08, 1, 0x04, 0x00000004 },
53 { 0x41be0c, 1, 0x04, 0x00000000 },
54 { 0x41be10, 1, 0x04, 0x003b8bc7 },
55 { 0x41be14, 2, 0x04, 0x00000000 },
56 {}
57 };
58
59 const struct gf100_gr_init
60 gf117_gr_init_wwdx_0[] = {
61 { 0x41bfd4, 1, 0x04, 0x00800000 },
62 { 0x41bfdc, 1, 0x04, 0x00000000 },
63 { 0x41bff8, 2, 0x04, 0x00000000 },
64 {}
65 };
66
67 const struct gf100_gr_init
68 gf117_gr_init_cbm_0[] = {
69 { 0x41becc, 1, 0x04, 0x00000000 },
70 { 0x41bee8, 2, 0x04, 0x00000000 },
71 {}
72 };
73
74 static const struct gf100_gr_pack
75 gf117_gr_pack_mmio[] = {
76 { gf100_gr_init_main_0 },
77 { gf100_gr_init_fe_0 },
78 { gf100_gr_init_pri_0 },
79 { gf100_gr_init_rstr2d_0 },
80 { gf119_gr_init_pd_0 },
81 { gf119_gr_init_ds_0 },
82 { gf100_gr_init_scc_0 },
83 { gf119_gr_init_prop_0 },
84 { gf108_gr_init_gpc_unk_0 },
85 { gf100_gr_init_setup_0 },
86 { gf100_gr_init_crstr_0 },
87 { gf108_gr_init_setup_1 },
88 { gf100_gr_init_zcull_0 },
89 { gf119_gr_init_gpm_0 },
90 { gf119_gr_init_gpc_unk_1 },
91 { gf100_gr_init_gcc_0 },
92 { gf100_gr_init_tpccs_0 },
93 { gf119_gr_init_tex_0 },
94 { gf117_gr_init_pe_0 },
95 { gf100_gr_init_l1c_0 },
96 { gf100_gr_init_mpc_0 },
97 { gf119_gr_init_sm_0 },
98 { gf117_gr_init_pes_0 },
99 { gf117_gr_init_wwdx_0 },
100 { gf117_gr_init_cbm_0 },
101 { gf100_gr_init_be_0 },
102 { gf119_gr_init_fe_1 },
103 {}
104 };
105
106 /*******************************************************************************
107 * PGRAPH engine/subdev functions
108 ******************************************************************************/
109
110 #include "fuc/hubgf117.fuc3.h"
111
112 static struct gf100_gr_ucode
113 gf117_gr_fecs_ucode = {
114 .code.data = gf117_grhub_code,
115 .code.size = sizeof(gf117_grhub_code),
116 .data.data = gf117_grhub_data,
117 .data.size = sizeof(gf117_grhub_data),
118 };
119
120 #include "fuc/gpcgf117.fuc3.h"
121
122 static struct gf100_gr_ucode
123 gf117_gr_gpccs_ucode = {
124 .code.data = gf117_grgpc_code,
125 .code.size = sizeof(gf117_grgpc_code),
126 .data.data = gf117_grgpc_data,
127 .data.size = sizeof(gf117_grgpc_data),
128 };
129
130 void
gf117_gr_init_zcull(struct gf100_gr * gr)131 gf117_gr_init_zcull(struct gf100_gr *gr)
132 {
133 struct nvkm_device *device = gr->base.engine.subdev.device;
134 const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
135 const u8 tile_nr = ALIGN(gr->tpc_total, 32);
136 u8 bank[GPC_MAX] = {}, gpc, i, j;
137 u32 data;
138
139 for (i = 0; i < tile_nr; i += 8) {
140 for (data = 0, j = 0; j < 8 && i + j < gr->tpc_total; j++) {
141 data |= bank[gr->tile[i + j]] << (j * 4);
142 bank[gr->tile[i + j]]++;
143 }
144 nvkm_wr32(device, GPC_BCAST(0x0980 + ((i / 8) * 4)), data);
145 }
146
147 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
148 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
149 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
150 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
151 gr->tpc_total);
152 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
153 }
154
155 nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
156 }
157
158 static const struct gf100_gr_func
159 gf117_gr = {
160 .oneinit_tiles = gf100_gr_oneinit_tiles,
161 .oneinit_sm_id = gf100_gr_oneinit_sm_id,
162 .init = gf100_gr_init,
163 .init_gpc_mmu = gf100_gr_init_gpc_mmu,
164 .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
165 .init_zcull = gf117_gr_init_zcull,
166 .init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
167 .init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
168 .init_40601c = gf100_gr_init_40601c,
169 .init_419cc0 = gf100_gr_init_419cc0,
170 .init_419eb4 = gf100_gr_init_419eb4,
171 .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
172 .init_shader_exceptions = gf100_gr_init_shader_exceptions,
173 .init_400054 = gf100_gr_init_400054,
174 .trap_mp = gf100_gr_trap_mp,
175 .mmio = gf117_gr_pack_mmio,
176 .fecs.ucode = &gf117_gr_fecs_ucode,
177 .gpccs.ucode = &gf117_gr_gpccs_ucode,
178 .rops = gf100_gr_rops,
179 .ppc_nr = 1,
180 .grctx = &gf117_grctx,
181 .zbc = &gf100_gr_zbc,
182 .sclass = {
183 { -1, -1, FERMI_TWOD_A },
184 { -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A },
185 { -1, -1, FERMI_A, &gf100_fermi },
186 { -1, -1, FERMI_B, &gf100_fermi },
187 { -1, -1, FERMI_C, &gf100_fermi },
188 { -1, -1, FERMI_COMPUTE_A },
189 { -1, -1, FERMI_COMPUTE_B },
190 {}
191 }
192 };
193
194 static const struct gf100_gr_fwif
195 gf117_gr_fwif[] = {
196 { -1, gf100_gr_load, &gf117_gr },
197 { -1, gf100_gr_nofw, &gf117_gr },
198 {}
199 };
200
201 int
gf117_gr_new(struct nvkm_device * device,int index,struct nvkm_gr ** pgr)202 gf117_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
203 {
204 return gf100_gr_new_(gf117_gr_fwif, device, index, pgr);
205 }
206