xref: /dpdk/drivers/net/qede/base/ecore_iro_values.h (revision 58bb1ee4a50a3ce79241e5b033985a5697081fc2)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright (c) 2016 - 2018 Cavium Inc.
3  * All rights reserved.
4  * www.cavium.com
5  */
6 
7 #ifndef __IRO_VALUES_H__
8 #define __IRO_VALUES_H__
9 
10 /* Per-chip offsets in iro_arr in dwords */
11 #define E4_IRO_ARR_OFFSET 0
12 
13 /* IRO Array */
14 static const u32 iro_arr[] = {
15 	/* E4 */
16 	/* YSTORM_FLOW_CONTROL_MODE_OFFSET */
17 	/* offset=0x0, size=0x8 */
18 	0x00000000, 0x00000000, 0x00080000,
19 	/* TSTORM_PORT_STAT_OFFSET(port_id), */
20 	/* offset=0x3288, mult1=0x88, size=0x88 */
21 	0x00003288, 0x00000088, 0x00880000,
22 	/* TSTORM_LL2_PORT_STAT_OFFSET(port_id), */
23 	/* offset=0x58f0, mult1=0x20, size=0x20 */
24 	0x000058f0, 0x00000020, 0x00200000,
25 	/* USTORM_VF_PF_CHANNEL_READY_OFFSET(vf_id), */
26 	/* offset=0xb00, mult1=0x8, size=0x4 */
27 	0x00000b00, 0x00000008, 0x00040000,
28 	/* USTORM_FLR_FINAL_ACK_OFFSET(pf_id), */
29 	/* offset=0xa80, mult1=0x8, size=0x4 */
30 	0x00000a80, 0x00000008, 0x00040000,
31 	/* USTORM_EQE_CONS_OFFSET(pf_id), */
32 	/* offset=0x0, mult1=0x8, size=0x2 */
33 	0x00000000, 0x00000008, 0x00020000,
34 	/* USTORM_ETH_QUEUE_ZONE_OFFSET(queue_zone_id), */
35 	/* offset=0x80, mult1=0x8, size=0x4 */
36 	0x00000080, 0x00000008, 0x00040000,
37 	/* USTORM_COMMON_QUEUE_CONS_OFFSET(queue_zone_id), */
38 	/* offset=0x84, mult1=0x8, size=0x2 */
39 	0x00000084, 0x00000008, 0x00020000,
40 	/* XSTORM_PQ_INFO_OFFSET(pq_id), */
41 	/* offset=0x5718, mult1=0x4, size=0x4 */
42 	0x00005718, 0x00000004, 0x00040000,
43 	/* XSTORM_INTEG_TEST_DATA_OFFSET, */
44 	/* offset=0x4dd0, size=0x78 */
45 	0x00004dd0, 0x00000000, 0x00780000,
46 	/* YSTORM_INTEG_TEST_DATA_OFFSET */
47 	/* offset=0x3e40, size=0x78 */
48 	0x00003e40, 0x00000000, 0x00780000,
49 	/* PSTORM_INTEG_TEST_DATA_OFFSET, */
50 	/* offset=0x4480, size=0x78 */
51 	0x00004480, 0x00000000, 0x00780000,
52 	/* TSTORM_INTEG_TEST_DATA_OFFSET, */
53 	/* offset=0x3210, size=0x78 */
54 	0x00003210, 0x00000000, 0x00780000,
55 	/* MSTORM_INTEG_TEST_DATA_OFFSET */
56 	/* offset=0x3b50, size=0x78 */
57 	0x00003b50, 0x00000000, 0x00780000,
58 	/* USTORM_INTEG_TEST_DATA_OFFSET */
59 	/* offset=0x7f58, size=0x78 */
60 	0x00007f58, 0x00000000, 0x00780000,
61 	/* XSTORM_OVERLAY_BUF_ADDR_OFFSET, */
62 	/* offset=0x5f58, size=0x8 */
63 	0x00005f58, 0x00000000, 0x00080000,
64 	/* YSTORM_OVERLAY_BUF_ADDR_OFFSET */
65 	/* offset=0x7100, size=0x8 */
66 	0x00007100, 0x00000000, 0x00080000,
67 	/* PSTORM_OVERLAY_BUF_ADDR_OFFSET, */
68 	/* offset=0xaea0, size=0x8 */
69 	0x0000aea0, 0x00000000, 0x00080000,
70 	/* TSTORM_OVERLAY_BUF_ADDR_OFFSET, */
71 	/* offset=0x4398, size=0x8 */
72 	0x00004398, 0x00000000, 0x00080000,
73 	/* MSTORM_OVERLAY_BUF_ADDR_OFFSET */
74 	/* offset=0xa5a0, size=0x8 */
75 	0x0000a5a0, 0x00000000, 0x00080000,
76 	/* USTORM_OVERLAY_BUF_ADDR_OFFSET */
77 	/* offset=0xbde8, size=0x8 */
78 	0x0000bde8, 0x00000000, 0x00080000,
79 	/* TSTORM_LL2_RX_PRODS_OFFSET(core_rx_queue_id), */
80 	/* offset=0x20, mult1=0x4, size=0x4 */
81 	0x00000020, 0x00000004, 0x00040000,
82 	/* CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(core_rx_queue_id), */
83 	/* offset=0x56d0, mult1=0x10, size=0x10 */
84 	0x000056d0, 0x00000010, 0x00100000,
85 	/* CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(core_rx_queue_id), */
86 	/* offset=0xc210, mult1=0x30, size=0x30 */
87 	0x0000c210, 0x00000030, 0x00300000,
88 	/* CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(core_tx_stats_id), */
89 	/* offset=0xb088, mult1=0x38, size=0x38 */
90 	0x0000b088, 0x00000038, 0x00380000,
91 	/* MSTORM_QUEUE_STAT_OFFSET(stat_counter_id), */
92 	/* offset=0x3d20, mult1=0x80, size=0x40 */
93 	0x00003d20, 0x00000080, 0x00400000,
94 	/* MSTORM_TPA_TIMEOUT_US_OFFSET */
95 	/* offset=0xbf60, size=0x4 */
96 	0x0000bf60, 0x00000000, 0x00040000,
97 	/* MSTORM_ETH_VF_PRODS_OFFSET(vf_id,vf_queue_id), */
98 	/* offset=0x4560, mult1=0x80, mult2=0x4, size=0x4 */
99 	0x00004560, 0x00040080, 0x00040000,
100 	/* MSTORM_ETH_PF_PRODS_OFFSET(queue_id), */
101 	/* offset=0x1f8, mult1=0x4, size=0x4 */
102 	0x000001f8, 0x00000004, 0x00040000,
103 	/* MSTORM_ETH_PF_STAT_OFFSET(pf_id), */
104 	/* offset=0x3d60, mult1=0x80, size=0x20 */
105 	0x00003d60, 0x00000080, 0x00200000,
106 	/* USTORM_QUEUE_STAT_OFFSET(stat_counter_id), */
107 	/* offset=0x8960, mult1=0x40, size=0x30 */
108 	0x00008960, 0x00000040, 0x00300000,
109 	/* USTORM_ETH_PF_STAT_OFFSET(pf_id), */
110 	/* offset=0xe840, mult1=0x60, size=0x60 */
111 	0x0000e840, 0x00000060, 0x00600000,
112 	/* PSTORM_QUEUE_STAT_OFFSET(stat_counter_id), */
113 	/* offset=0x4618, mult1=0x80, size=0x38 */
114 	0x00004618, 0x00000080, 0x00380000,
115 	/* PSTORM_ETH_PF_STAT_OFFSET(pf_id), */
116 	/* offset=0x10738, mult1=0xc0, size=0xc0 */
117 	0x00010738, 0x000000c0, 0x00c00000,
118 	/* PSTORM_CTL_FRAME_ETHTYPE_OFFSET(ethType_id), */
119 	/* offset=0x1f8, mult1=0x2, size=0x2 */
120 	0x000001f8, 0x00000002, 0x00020000,
121 	/* TSTORM_ETH_PRS_INPUT_OFFSET, */
122 	/* offset=0xa2a8, size=0x108 */
123 	0x0000a2a8, 0x00000000, 0x01080000,
124 	/* ETH_RX_RATE_LIMIT_OFFSET(pf_id), */
125 	/* offset=0xa3b0, mult1=0x8, size=0x8 */
126 	0x0000a3b0, 0x00000008, 0x00080000,
127 	/* TSTORM_ETH_RSS_UPDATE_OFFSET(pf_id), */
128 	/* offset=0x1c0, mult1=0x8, size=0x8 */
129 	0x000001c0, 0x00000008, 0x00080000,
130 	/* XSTORM_ETH_QUEUE_ZONE_OFFSET(queue_id), */
131 	/* offset=0x1f8, mult1=0x8, size=0x8 */
132 	0x000001f8, 0x00000008, 0x00080000,
133 	/* YSTORM_TOE_CQ_PROD_OFFSET(rss_id), */
134 	/* offset=0xac0, mult1=0x8, size=0x8 */
135 	0x00000ac0, 0x00000008, 0x00080000,
136 	/* USTORM_TOE_CQ_PROD_OFFSET(rss_id), */
137 	/* offset=0x2578, mult1=0x8, size=0x8 */
138 	0x00002578, 0x00000008, 0x00080000,
139 	/* USTORM_TOE_GRQ_PROD_OFFSET(pf_id), */
140 	/* offset=0x24f8, mult1=0x8, size=0x8 */
141 	0x000024f8, 0x00000008, 0x00080000,
142 	/* TSTORM_SCSI_CMDQ_CONS_OFFSET(cmdq_queue_id), */
143 	/* offset=0x280, mult1=0x8, size=0x8 */
144 	0x00000280, 0x00000008, 0x00080000,
145 	/* TSTORM_SCSI_BDQ_EXT_PROD_OFFSET(storage_func_id,bdq_id), */
146 	/* offset=0x680, mult1=0x18, mult2=0x8, size=0x8 */
147 	0x00000680, 0x00080018, 0x00080000,
148 	/* MSTORM_SCSI_BDQ_EXT_PROD_OFFSET(storage_func_id,bdq_id), */
149 	/* offset=0xb78, mult1=0x18, mult2=0x8, size=0x2 */
150 	0x00000b78, 0x00080018, 0x00020000,
151 	/* TSTORM_ISCSI_RX_STATS_OFFSET(storage_func_id), */
152 	/* offset=0xc648, mult1=0x50, size=0x3c */
153 	0x0000c648, 0x00000050, 0x003c0000,
154 	/* MSTORM_ISCSI_RX_STATS_OFFSET(storage_func_id), */
155 	/* offset=0x12038, mult1=0x18, size=0x10 */
156 	0x00012038, 0x00000018, 0x00100000,
157 	/* USTORM_ISCSI_RX_STATS_OFFSET(storage_func_id), */
158 	/* offset=0x11b00, mult1=0x40, size=0x18 */
159 	0x00011b00, 0x00000040, 0x00180000,
160 	/* XSTORM_ISCSI_TX_STATS_OFFSET(storage_func_id), */
161 	/* offset=0x95d0, mult1=0x50, size=0x20 */
162 	0x000095d0, 0x00000050, 0x00200000,
163 	/* YSTORM_ISCSI_TX_STATS_OFFSET(storage_func_id), */
164 	/* offset=0x8b10, mult1=0x40, size=0x28 */
165 	0x00008b10, 0x00000040, 0x00280000,
166 	/* PSTORM_ISCSI_TX_STATS_OFFSET(storage_func_id), */
167 	/* offset=0x11640, mult1=0x18, size=0x10 */
168 	0x00011640, 0x00000018, 0x00100000,
169 	/* TSTORM_FCOE_RX_STATS_OFFSET(pf_id), */
170 	/* offset=0xc830, mult1=0x48, size=0x38 */
171 	0x0000c830, 0x00000048, 0x00380000,
172 	/* PSTORM_FCOE_TX_STATS_OFFSET(pf_id), */
173 	/* offset=0x11710, mult1=0x20, size=0x20 */
174 	0x00011710, 0x00000020, 0x00200000,
175 	/* PSTORM_RDMA_QUEUE_STAT_OFFSET(rdma_stat_counter_id), */
176 	/* offset=0x4650, mult1=0x80, size=0x10 */
177 	0x00004650, 0x00000080, 0x00100000,
178 	/* TSTORM_RDMA_QUEUE_STAT_OFFSET(rdma_stat_counter_id), */
179 	/* offset=0x3618, mult1=0x10, size=0x10 */
180 	0x00003618, 0x00000010, 0x00100000,
181 	/* XSTORM_RDMA_ASSERT_LEVEL_OFFSET(pf_id), */
182 	/* offset=0xa968, mult1=0x8, size=0x1 */
183 	0x0000a968, 0x00000008, 0x00010000,
184 	/* YSTORM_RDMA_ASSERT_LEVEL_OFFSET(pf_id), */
185 	/* offset=0x97a0, mult1=0x8, size=0x1 */
186 	0x000097a0, 0x00000008, 0x00010000,
187 	/* PSTORM_RDMA_ASSERT_LEVEL_OFFSET(pf_id), */
188 	/* offset=0x11990, mult1=0x8, size=0x1 */
189 	0x00011990, 0x00000008, 0x00010000,
190 	/* TSTORM_RDMA_ASSERT_LEVEL_OFFSET(pf_id), */
191 	/* offset=0xf020, mult1=0x8, size=0x1 */
192 	0x0000f020, 0x00000008, 0x00010000,
193 	/* MSTORM_RDMA_ASSERT_LEVEL_OFFSET(pf_id), */
194 	/* offset=0x12628, mult1=0x8, size=0x1 */
195 	0x00012628, 0x00000008, 0x00010000,
196 	/* USTORM_RDMA_ASSERT_LEVEL_OFFSET(pf_id), */
197 	/* offset=0x11da8, mult1=0x8, size=0x1 */
198 	0x00011da8, 0x00000008, 0x00010000,
199 	/* XSTORM_IWARP_RXMIT_STATS_OFFSET(pf_id), */
200 	/* offset=0xaa78, mult1=0x30, size=0x10 */
201 	0x0000aa78, 0x00000030, 0x00100000,
202 	/* TSTORM_ROCE_EVENTS_STAT_OFFSET(roce_pf_id), */
203 	/* offset=0xd770, mult1=0x28, size=0x28 */
204 	0x0000d770, 0x00000028, 0x00280000,
205 	/* YSTORM_ROCE_DCQCN_RECEIVED_STATS_OFFSET(roce_pf_id), */
206 	/* offset=0x9a58, mult1=0x18, size=0x18 */
207 	0x00009a58, 0x00000018, 0x00180000,
208 	/* YSTORM_ROCE_ERROR_STATS_OFFSET(roce_pf_id), */
209 	/* offset=0x9bd8, mult1=0x8, size=0x8 */
210 	0x00009bd8, 0x00000008, 0x00080000,
211 	/* PSTORM_ROCE_DCQCN_SENT_STATS_OFFSET(roce_pf_id), */
212 	/* offset=0x13a18, mult1=0x8, size=0x8 */
213 	0x00013a18, 0x00000008, 0x00080000,
214 	/* USTORM_ROCE_CQE_STATS_OFFSET(roce_pf_id), */
215 	/* offset=0x126e8, mult1=0x18, size=0x18 */
216 	0x000126e8, 0x00000018, 0x00180000,
217 	/* TSTORM_NVMF_PORT_TASKPOOL_PRODUCER_CONSUMER_OFFSET(port_num_id,taskpool_index), */
218 	/* offset=0xe610, mult1=0x288, mult2=0x50, size=0x10 */
219 	0x0000e610, 0x00500288, 0x00100000,
220 	/* USTORM_NVMF_PORT_COUNTERS_OFFSET(port_num_id), */
221 	/* offset=0x12970, mult1=0x138, size=0x28 */
222 	0x00012970, 0x00000138, 0x00280000,
223 };
224 /* Data size: 828 bytes */
225 
226 
227 #endif /* __IRO_VALUES_H__ */
228