xref: /netbsd-src/sys/dev/fdt/dw_apb_uart.c (revision 2fa7e14158d403140e8fb3c233c9e17417a69d87)
1 /* $NetBSD: dw_apb_uart.c,v 1.12 2022/04/08 10:17:54 andvar Exp $ */
2 
3 /*-
4  * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 
31 __KERNEL_RCSID(1, "$NetBSD: dw_apb_uart.c,v 1.12 2022/04/08 10:17:54 andvar Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/intr.h>
37 #include <sys/systm.h>
38 #include <sys/time.h>
39 #include <sys/termios.h>
40 
41 #include <dev/ic/comvar.h>
42 
43 #include <dev/fdt/fdtvar.h>
44 
45 static int dw_apb_uart_match(device_t, cfdata_t, void *);
46 static void dw_apb_uart_attach(device_t, device_t, void *);
47 
48 static const struct device_compatible_entry compat_data[] = {
49 	{ .compat = "snps,dw-apb-uart" },
50 	DEVICE_COMPAT_EOL
51 };
52 
53 struct dw_apb_uart_softc {
54 	struct com_softc ssc_sc;
55 	void *ssc_ih;
56 
57 	struct clk *ssc_clk;
58 	struct clk *ssc_pclk;
59 	struct fdtbus_reset *ssc_rst;
60 };
61 
62 CFATTACH_DECL_NEW(dw_apb_uart, sizeof(struct dw_apb_uart_softc),
63 	dw_apb_uart_match, dw_apb_uart_attach, NULL, NULL);
64 
65 static int
dw_apb_uart_match(device_t parent,cfdata_t cf,void * aux)66 dw_apb_uart_match(device_t parent, cfdata_t cf, void *aux)
67 {
68 	struct fdt_attach_args * const faa = aux;
69 
70 	return of_compatible_match(faa->faa_phandle, compat_data);
71 }
72 
73 static void
dw_apb_uart_attach(device_t parent,device_t self,void * aux)74 dw_apb_uart_attach(device_t parent, device_t self, void *aux)
75 {
76 	struct dw_apb_uart_softc * const ssc = device_private(self);
77 	struct com_softc * const sc = &ssc->ssc_sc;
78 	struct fdt_attach_args * const faa = aux;
79 	const int phandle = faa->faa_phandle;
80 	bus_space_tag_t bst = faa->faa_bst;
81 	bus_space_handle_t bsh;
82 	char intrstr[128];
83 	bus_addr_t addr;
84 	bus_size_t size;
85 	u_int reg_shift, reg_iowidth;
86 	int error;
87 
88 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
89 		aprint_error(": couldn't get registers\n");
90 		return;
91 	}
92 
93 	if (of_getprop_uint32(phandle, "reg-shift", &reg_shift)) {
94 		/* missing or bad reg-shift property, assume 2 */
95 		reg_shift = 2;
96 	}
97 	if (of_getprop_uint32(phandle, "reg-io-width", &reg_iowidth)) {
98 		/* missing or bad reg-io-width property, assume 1 */
99 		reg_iowidth = 1;
100 	}
101 
102 	sc->sc_dev = self;
103 
104 	ssc->ssc_clk = fdtbus_clock_get_index(phandle, 0);
105 	if (ssc->ssc_clk == NULL) {
106 		aprint_error(": couldn't get clock\n");
107 		return;
108 	}
109 	if (clk_enable(ssc->ssc_clk) != 0) {
110 		aprint_error(": couldn't enable clock\n");
111 		return;
112 	}
113 
114 	ssc->ssc_pclk = fdtbus_clock_get(phandle, "apb_pclk");
115 	if (ssc->ssc_pclk != NULL && clk_enable(ssc->ssc_pclk) != 0) {
116 		aprint_error(": couldn't enable peripheral clock\n");
117 		return;
118 	}
119 
120 	ssc->ssc_rst = fdtbus_reset_get_index(phandle, 0);
121 	if (ssc->ssc_rst && fdtbus_reset_deassert(ssc->ssc_rst) != 0) {
122 		aprint_error(": couldn't de-assert reset\n");
123 		return;
124 	}
125 
126 	sc->sc_frequency = clk_get_rate(ssc->ssc_clk);
127 	sc->sc_type = COM_TYPE_DW_APB;
128 
129 	error = bus_space_map(bst, addr, size, 0, &bsh);
130 	if (error) {
131 		aprint_error(": couldn't map %#" PRIx64 ": %d", (uint64_t)addr, error);
132 		return;
133 	}
134 
135 	com_init_regs_stride_width(&sc->sc_regs, bst, bsh, addr, reg_shift, reg_iowidth);
136 
137 	com_attach_subr(sc);
138 
139 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
140 		aprint_error_dev(self, "failed to decode interrupt\n");
141 		return;
142 	}
143 
144 	ssc->ssc_ih = fdtbus_intr_establish_xname(phandle, 0,
145 	    IPL_SERIAL, FDT_INTR_MPSAFE, comintr, sc, device_xname(self));
146 	if (ssc->ssc_ih == NULL) {
147 		aprint_error_dev(self, "failed to establish interrupt on %s\n",
148 		    intrstr);
149 	}
150 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
151 }
152 
153 /*
154  * Console support
155  */
156 
157 static int
dw_apb_uart_console_match(int phandle)158 dw_apb_uart_console_match(int phandle)
159 {
160 	return of_compatible_match(phandle, compat_data);
161 }
162 
163 static void
dw_apb_uart_console_consinit(struct fdt_attach_args * faa,u_int uart_freq)164 dw_apb_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
165 {
166 	const int phandle = faa->faa_phandle;
167 	bus_space_tag_t bst = faa->faa_bst;
168 	bus_space_handle_t dummy_bsh;
169 	struct com_regs regs;
170 	bus_addr_t addr;
171 	tcflag_t flags;
172 	u_int reg_shift, reg_iowidth;
173 	int speed;
174 
175 	fdtbus_get_reg(phandle, 0, &addr, NULL);
176 	speed = fdtbus_get_stdout_speed();
177 	if (speed < 0)
178 		speed = 115200;	/* default */
179 	flags = fdtbus_get_stdout_flags();
180 
181 	if (of_getprop_uint32(phandle, "reg-shift", &reg_shift)) {
182 		/* missing or bad reg-shift property, assume 2 */
183 		reg_shift = 2;
184 	}
185 	if (of_getprop_uint32(phandle, "reg-io-width", &reg_iowidth)) {
186 		/* missing or bad reg-io-width property, assume 1 */
187 		reg_iowidth = 1;
188 	}
189 
190 	memset(&dummy_bsh, 0, sizeof(dummy_bsh));
191 	com_init_regs_stride_width(&regs, bst, dummy_bsh, addr, reg_shift, reg_iowidth);
192 
193 	if (comcnattach1(&regs, speed, uart_freq, COM_TYPE_DW_APB, flags))
194 		panic("Cannot initialize dw-apb-uart console");
195 }
196 
197 static const struct fdt_console dw_apb_uart_console = {
198 	.match = dw_apb_uart_console_match,
199 	.consinit = dw_apb_uart_console_consinit,
200 };
201 
202 FDT_CONSOLE(dw_apb_uart, &dw_apb_uart_console);
203