1 /* $NetBSD: tegra210-mc.h,v 1.1.1.4 2021/11/07 16:49:56 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 #ifndef DT_BINDINGS_MEMORY_TEGRA210_MC_H 5 #define DT_BINDINGS_MEMORY_TEGRA210_MC_H 6 7 #define TEGRA_SWGROUP_PTC 0 8 #define TEGRA_SWGROUP_DC 1 9 #define TEGRA_SWGROUP_DCB 2 10 #define TEGRA_SWGROUP_AFI 3 11 #define TEGRA_SWGROUP_AVPC 4 12 #define TEGRA_SWGROUP_HDA 5 13 #define TEGRA_SWGROUP_HC 6 14 #define TEGRA_SWGROUP_NVENC 7 15 #define TEGRA_SWGROUP_PPCS 8 16 #define TEGRA_SWGROUP_SATA 9 17 #define TEGRA_SWGROUP_MPCORE 10 18 #define TEGRA_SWGROUP_ISP2 11 19 #define TEGRA_SWGROUP_XUSB_HOST 12 20 #define TEGRA_SWGROUP_XUSB_DEV 13 21 #define TEGRA_SWGROUP_ISP2B 14 22 #define TEGRA_SWGROUP_TSEC 15 23 #define TEGRA_SWGROUP_A9AVP 16 24 #define TEGRA_SWGROUP_GPU 17 25 #define TEGRA_SWGROUP_SDMMC1A 18 26 #define TEGRA_SWGROUP_SDMMC2A 19 27 #define TEGRA_SWGROUP_SDMMC3A 20 28 #define TEGRA_SWGROUP_SDMMC4A 21 29 #define TEGRA_SWGROUP_VIC 22 30 #define TEGRA_SWGROUP_VI 23 31 #define TEGRA_SWGROUP_NVDEC 24 32 #define TEGRA_SWGROUP_APE 25 33 #define TEGRA_SWGROUP_NVJPG 26 34 #define TEGRA_SWGROUP_SE 27 35 #define TEGRA_SWGROUP_AXIAP 28 36 #define TEGRA_SWGROUP_ETR 29 37 #define TEGRA_SWGROUP_TSECB 30 38 #define TEGRA_SWGROUP_NV 31 39 #define TEGRA_SWGROUP_NV2 32 40 #define TEGRA_SWGROUP_PPCS1 33 41 #define TEGRA_SWGROUP_DC1 34 42 #define TEGRA_SWGROUP_PPCS2 35 43 #define TEGRA_SWGROUP_HC1 36 44 #define TEGRA_SWGROUP_SE1 37 45 #define TEGRA_SWGROUP_TSEC1 38 46 #define TEGRA_SWGROUP_TSECB1 39 47 #define TEGRA_SWGROUP_NVDEC1 40 48 49 #define TEGRA210_MC_RESET_AFI 0 50 #define TEGRA210_MC_RESET_AVPC 1 51 #define TEGRA210_MC_RESET_DC 2 52 #define TEGRA210_MC_RESET_DCB 3 53 #define TEGRA210_MC_RESET_HC 4 54 #define TEGRA210_MC_RESET_HDA 5 55 #define TEGRA210_MC_RESET_ISP2 6 56 #define TEGRA210_MC_RESET_MPCORE 7 57 #define TEGRA210_MC_RESET_NVENC 8 58 #define TEGRA210_MC_RESET_PPCS 9 59 #define TEGRA210_MC_RESET_SATA 10 60 #define TEGRA210_MC_RESET_VI 11 61 #define TEGRA210_MC_RESET_VIC 12 62 #define TEGRA210_MC_RESET_XUSB_HOST 13 63 #define TEGRA210_MC_RESET_XUSB_DEV 14 64 #define TEGRA210_MC_RESET_A9AVP 15 65 #define TEGRA210_MC_RESET_TSEC 16 66 #define TEGRA210_MC_RESET_SDMMC1 17 67 #define TEGRA210_MC_RESET_SDMMC2 18 68 #define TEGRA210_MC_RESET_SDMMC3 19 69 #define TEGRA210_MC_RESET_SDMMC4 20 70 #define TEGRA210_MC_RESET_ISP2B 21 71 #define TEGRA210_MC_RESET_GPU 22 72 #define TEGRA210_MC_RESET_NVDEC 23 73 #define TEGRA210_MC_RESET_APE 24 74 #define TEGRA210_MC_RESET_SE 25 75 #define TEGRA210_MC_RESET_NVJPG 26 76 #define TEGRA210_MC_RESET_AXIAP 27 77 #define TEGRA210_MC_RESET_ETR 28 78 #define TEGRA210_MC_RESET_TSECB 29 79 80 #endif 81