1 /* $NetBSD: tegra114-mc.h,v 1.1.1.3 2018/06/27 16:27:08 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 #ifndef DT_BINDINGS_MEMORY_TEGRA114_MC_H 5 #define DT_BINDINGS_MEMORY_TEGRA114_MC_H 6 7 #define TEGRA_SWGROUP_PTC 0 8 #define TEGRA_SWGROUP_DC 1 9 #define TEGRA_SWGROUP_DCB 2 10 #define TEGRA_SWGROUP_EPP 3 11 #define TEGRA_SWGROUP_G2 4 12 #define TEGRA_SWGROUP_AVPC 5 13 #define TEGRA_SWGROUP_NV 6 14 #define TEGRA_SWGROUP_HDA 7 15 #define TEGRA_SWGROUP_HC 8 16 #define TEGRA_SWGROUP_MSENC 9 17 #define TEGRA_SWGROUP_PPCS 10 18 #define TEGRA_SWGROUP_VDE 11 19 #define TEGRA_SWGROUP_MPCORELP 12 20 #define TEGRA_SWGROUP_MPCORE 13 21 #define TEGRA_SWGROUP_VI 14 22 #define TEGRA_SWGROUP_ISP 15 23 #define TEGRA_SWGROUP_XUSB_HOST 16 24 #define TEGRA_SWGROUP_XUSB_DEV 17 25 #define TEGRA_SWGROUP_EMUCIF 18 26 #define TEGRA_SWGROUP_TSEC 19 27 28 #define TEGRA114_MC_RESET_AVPC 0 29 #define TEGRA114_MC_RESET_DC 1 30 #define TEGRA114_MC_RESET_DCB 2 31 #define TEGRA114_MC_RESET_EPP 3 32 #define TEGRA114_MC_RESET_2D 4 33 #define TEGRA114_MC_RESET_HC 5 34 #define TEGRA114_MC_RESET_HDA 6 35 #define TEGRA114_MC_RESET_ISP 7 36 #define TEGRA114_MC_RESET_MPCORE 8 37 #define TEGRA114_MC_RESET_MPCORELP 9 38 #define TEGRA114_MC_RESET_MPE 10 39 #define TEGRA114_MC_RESET_3D 11 40 #define TEGRA114_MC_RESET_3D2 12 41 #define TEGRA114_MC_RESET_PPCS 13 42 #define TEGRA114_MC_RESET_VDE 14 43 #define TEGRA114_MC_RESET_VI 15 44 45 #endif 46