xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: display_rq_dlg_calc_20.h,v 1.2 2021/12/18 23:45:04 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2018 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 #ifndef __DML20_DISPLAY_RQ_DLG_CALC_H__
29 #define __DML20_DISPLAY_RQ_DLG_CALC_H__
30 
31 #include "../dml_common_defs.h"
32 #include "../display_rq_dlg_helpers.h"
33 
34 struct display_mode_lib;
35 
36 
37 // Function: dml_rq_dlg_get_rq_reg
38 //  Main entry point for test to get the register values out of this DML class.
39 //  This function calls <get_rq_param> and <extract_rq_regs> fucntions to calculate
40 //  and then populate the rq_regs struct
41 // Input:
42 //  pipe_src_param - pipe source configuration (e.g. vp, pitch, etc.)
43 // Output:
44 //  rq_regs - struct that holds all the RQ registers field value.
45 //            See also: <display_rq_regs_st>
46 void dml20_rq_dlg_get_rq_reg(
47 		struct display_mode_lib *mode_lib,
48 		display_rq_regs_st *rq_regs,
49 		const display_pipe_params_st pipe_param);
50 
51 
52 // Function: dml_rq_dlg_get_dlg_reg
53 //   Calculate and return DLG and TTU register struct given the system setting
54 // Output:
55 //  dlg_regs - output DLG register struct
56 //  ttu_regs - output DLG TTU register struct
57 // Input:
58 //  e2e_pipe_param - "compacted" array of e2e pipe param struct
59 //  num_pipes - num of active "pipe" or "route"
60 //  pipe_idx - index that identifies the e2e_pipe_param that corresponding to this dlg
61 //  cstate - 0: when calculate min_ttu_vblank it is assumed cstate is not required. 1: Normal mode, cstate is considered.
62 //           Added for legacy or unrealistic timing tests.
63 void dml20_rq_dlg_get_dlg_reg(
64 		struct display_mode_lib *mode_lib,
65 		display_dlg_regs_st *dlg_regs,
66 		display_ttu_regs_st *ttu_regs,
67 		display_e2e_pipe_params_st *e2e_pipe_param,
68 		const unsigned int num_pipes,
69 		const unsigned int pipe_idx,
70 		const bool cstate_en,
71 		const bool pstate_en,
72 		const bool vm_en,
73 		const bool ignore_viewport_pos,
74 		const bool immediate_flip_support);
75 
76 #endif
77