1 /*- 2 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Fleischer <paul@xpg.dk> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 32 * 33 * Permission to use, copy, modify, and distribute this software for any 34 * purpose with or without fee is hereby granted, provided that the above 35 * copyright notice and this permission notice appear in all copies. 36 * 37 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 38 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 39 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 40 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 41 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 42 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 43 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 44 */ 45 #ifndef _SDIF_H_ 46 #define _SDIF_H_ 47 48 #include <sys/types.h> 49 #include <sys/queue.h> 50 51 /* Delay function used by SD/MMC drivers */ 52 void sdmmc_delay(int); 53 54 #define SDMMC_SECTOR_SIZE_SB 9 55 #define SDMMC_SECTOR_SIZE (1 << SDMMC_SECTOR_SIZE_SB) /* =512 */ 56 57 struct sdmmc_csd { 58 int csdver; /* CSD structure format */ 59 u_int mmcver; /* MMC version (for CID format) */ 60 int capacity; /* total number of sectors */ 61 int read_bl_len; /* block length for reads */ 62 int write_bl_len; /* block length for writes */ 63 int r2w_factor; 64 int tran_speed; /* transfer speed (kbit/s) */ 65 int ccc; /* Card Command Class for SD */ 66 /* ... */ 67 }; 68 69 struct sdmmc_cid { 70 int mid; /* manufacturer identification number */ 71 int oid; /* OEM/product identification number */ 72 char pnm[8]; /* product name (MMC v1 has the longest) */ 73 int rev; /* product revision */ 74 int psn; /* product serial number */ 75 int mdt; /* manufacturing date */ 76 }; 77 78 struct sdmmc_scr { 79 int sd_spec; 80 int bus_width; 81 }; 82 83 typedef uint32_t sdmmc_response[4]; 84 85 struct sdmmc_command { 86 uint16_t c_opcode; /* SD or MMC command index */ 87 uint32_t c_arg; /* SD/MMC command argument */ 88 sdmmc_response c_resp; /* response buffer */ 89 /*bus_dmamap_t c_dmamap;*/ 90 void *c_data; /* buffer to send or read into */ 91 int c_datalen; /* length of data buffer */ 92 int c_blklen; /* block length */ 93 int c_flags; /* see below */ 94 #define SCF_ITSDONE (1U << 0) /* command is complete */ 95 #define SCF_RSP_PRESENT (1U << 1) 96 #define SCF_RSP_BSY (1U << 2) 97 #define SCF_RSP_136 (1U << 3) 98 #define SCF_RSP_CRC (1U << 4) 99 #define SCF_RSP_IDX (1U << 5) 100 #define SCF_CMD_READ (1U << 6) /* read command (data expected) */ 101 /* non SPI */ 102 #define SCF_CMD_AC (0U << 8) 103 #define SCF_CMD_ADTC (1U << 8) 104 #define SCF_CMD_BC (2U << 8) 105 #define SCF_CMD_BCR (3U << 8) 106 #define SCF_CMD_MASK (3U << 8) 107 /* SPI */ 108 #define SCF_RSP_SPI_S1 (1U << 10) 109 #define SCF_RSP_SPI_S2 (1U << 11) 110 #define SCF_RSP_SPI_B4 (1U << 12) 111 #define SCF_RSP_SPI_BSY (1U << 13) 112 /* response types */ 113 #define SCF_RSP_R0 0 /* none */ 114 #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 115 #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 116 #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136) 117 #define SCF_RSP_R3 (SCF_RSP_PRESENT) 118 #define SCF_RSP_R4 (SCF_RSP_PRESENT) 119 #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 120 #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 121 #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 122 #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 123 /* SPI */ 124 #define SCF_RSP_SPI_R1 (SCF_RSP_SPI_S1) 125 #define SCF_RSP_SPI_R1B (SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY) 126 #define SCF_RSP_SPI_R2 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 127 #define SCF_RSP_SPI_R3 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 128 #define SCF_RSP_SPI_R4 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 129 #define SCF_RSP_SPI_R5 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 130 #define SCF_RSP_SPI_R7 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 131 int c_error; /* errno value on completion */ 132 133 /* Host controller owned fields for data xfer in progress */ 134 int c_resid; /* remaining I/O */ 135 u_char *c_buf; /* remaining data */ 136 }; 137 138 /* 139 * Decoded PC Card 16 based Card Information Structure (CIS), 140 * per card (function 0) and per function (1 and greater). 141 */ 142 struct sdmmc_cis { 143 uint16_t manufacturer; 144 #define SDMMC_VENDOR_INVALID 0xffff 145 uint16_t product; 146 #define SDMMC_PRODUCT_INVALID 0xffff 147 uint8_t function; 148 #define SDMMC_FUNCTION_INVALID 0xff 149 u_char cis1_major; 150 u_char cis1_minor; 151 char cis1_info_buf[256]; 152 char *cis1_info[4]; 153 }; 154 155 #define SMF_INITED 0x0001 156 #define SMF_SD_MODE 0x0002 /* host in SD mode (MMC otherwise) */ 157 #define SMF_IO_MODE 0x0004 /* host in I/O mode (SD mode only) */ 158 #define SMF_MEM_MODE 0x0008 /* host in memory mode (SD or MMC) */ 159 #define SMF_CARD_PRESENT 0x4000 /* card presence noticed */ 160 #define SMF_CARD_ATTACHED 0x8000 /* card driver(s) attached */ 161 #define SMF_CARD_SDHC 0x0010 /* card is sdhc */ 162 163 #define SMC_CAPS_AUTO_STOP 0x0001 /* send CMD12 automagically by host */ 164 #define SMC_CAPS_4BIT_MODE 0x0002 /* 4-bits data bus width */ 165 #define SMC_CAPS_DMA 0x0004 /* DMA transfer */ 166 #define SMC_CAPS_SPI_MODE 0x0008 /* SPI mode */ 167 #define SMC_CAPS_POLL_CARD_DET 0x0010 /* Polling card detect */ 168 #define SMC_CAPS_SINGLE_ONLY 0x0020 /* only single read/write */ 169 170 #endif 171